Processors

Predicting Memory Activity Using Spatial Correlation

Free registration required

Executive Summary

The memory wall continues to pose a performance bottleneck for computer systems - studies show that modern servers spend up to two-thirds of execution time stalled on memory accesses. Although recent trends forecast growth in processor clock frequencies to be minimal, improvements to memory access latencies are correspondingly slow. Traditional approaches, such as large on-chip caches, hardware multithreading, and out-of-order processing, demonstrate some success at mitigating the impact of high memory latencies, but offer little hope of completely overcoming the memory wall.

  • Format: PDF
  • Size: 1186 KB