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Many hardware optimizations rely on collecting information about program behavior at runtime. This information is stored in lookup tables. To be accurate and effective, these optimizations usually require large dedicated on-chip tables. Although technology advances offer an increased amount of on-chip resources, these resources are allocated to increase the size of on-chip conventional cache hierarchies. This paper proposes Predictor Virtualization, a technique that uses the existing memory hierarchy to emulate large predictor tables. It demonstrates the benefits of this technique by virtualizing a state-of-the-art data prefetcher.
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