PUMA: Placement Unification With Mapping and Guaranteed Throughput Allocation on an FPGA Using a Hardwired NoC
Platform-based Field Programmable Gate Arrays (FPGAs) have gained popularity for implementing Multi-Processor System on Chips (MPSoCs). The applications in an MPSoC can have high complexities and stringent Quality-of-Service (QoS) demands. Consequently, the problem of binding an application on an FPGA has become more challenging. An application requires logic and communication resources for computing and transporting data among its IPs. This in turn divides an FPGA into two virtual planes, i.e., logic and communication. Therefore, the available resources in both the FPGA planes should be taken into account by an application binding solution.