Date Added: Nov 2010
With the problems of high speed and asynchronism in a multi-channel video, a video monitor system based on FPGA and SRAM is designed and implemented. The system adopts the method of time-division multiplexing to realize the function of four-channel video parallel acquisition. The synchronization between four-channel video is achieved by using the field-selected algorithm. The four-channel video can be outputted to LCD with the technique of ping-pang cache. The LCD display sequences are generated by the finite state machine using Verilog HDL. The system is simple, flexible and with high-quality, and it has a broad application prospect.