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Three-dimensional (3D) integration has the potential to improve the communication latency and integration density of chip-level multiprocessors (CMPs). However, the stacked high power density layers of 3D CMPs increase the importance and difficulty of thermal management. In this paper, the authors investigate the 3D CMP run-time thermal management problem and describe efficient management techniques. This work makes the following main contributions: It identifies and describes the critical concepts required for optimal thermal management, namely the methods by which heterogeneity in both workload power characteristics and processor core thermal characteristics should be exploited and it proposes an efficient, proactive, continuously-engaged hardware and operating system thermal management technique governed by optimal thermal management polices.
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