Hardware

Sampling Correlation Sources for Timing Yield Analysis of Sequential Circuits With Clock Networks

Date Added: Jun 2011
Format: PDF

Analyzing timing yield under process variations is difficult because of the presence of correlations. Reconvergent Fan-Out Nodes (RFONs) within combinational subcircuits are a major source of topological correlation. The authors identify two more sources of topological correlation in clocked sequential circuit: sequential RFONs, which are nodes within a clock network where the clock paths to more than one flip-flop branch out; and sequential branch-points, which are nodes within a combinational block where combinational paths to more than one capturing flip-flop branch out. Dealing with all sources of correlation is unacceptably complicated, and they therefore, show how to sample a handful of correlation sources without sacrificing significant accuracy in the yield.