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Hardware Trojans (HTs) have become a major concern in the modern IC industry, especially with the fast growth in IC outsourcing. HT detection and diagnosis are challenging due to the huge number of gates in modern IC designs and the high cost of testing. The authors propose a scalable and efficient HT detection and diagnosis scheme based on segmentation and self-consistency analysis of gate-level properties. Also, they employ a new technology named variable elimination to create sub-segments from a fixed set of power measurements of the entire IC in order to minimize the number of power measurements. They evaluate their HT detection and diagnosis schemes on a set of ISCAS and ITC benchmarks.
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