Silicon Photonic WDM Point-to-Point Network for Multi-Chip Processor Interconnects

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Executive Summary

Processor performance in instructions per second continues to rise. But the improvement is no longer coming from increasing clock rates due to the associated power, heat and design complexity costs. Instead, parallelism through multi-core processing has become the technology choice to continue processor performance scaling. Processors with 8 cores and 64 threads are commercially available [I], and an 80-core experimental processor has been reported. This trend is expected to continue to hundreds of cores on a chip. With increasing numbers of multi-threaded cores integrated on a single chip, an emerging challenge is to provide a low-latency, low power, and high bandwidth network to effectively interconnect the cores.

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