Simple But Effective Heterogeneous Main Memory With On-Chip Memory Controller Support

Free registration required

Executive Summary

System-in-Package (SiP) and 3D integration are promising technologies to bring more memory onto a microprocessor package to mitigate the "Memory wall" problem. In this paper, instead of using them to build caches, the authors study a heterogeneous main memory using both on- and off-package memories providing both fast and high-bandwidth on-package accesses and expandable and low-cost commodity off-package memory capacity. They introduce another layer of address translation coupled with an on-chip memory controller that can dynamically migrate data between off-package and off-package memory either in hardware or with operating system assistance depending on the migration granularity.

  • Format: PDF
  • Size: 274.2 KB