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Due to the constant development in the integrated circuits, the automatic test pattern generation problem become more vital for sequential VLSI circuits in these days. Also testing of integrating circuits and systems has become a difficult problem. In this paper, the authors have discussed the problem of the automatic test sequence generation using Particle Swarm Optimization (PSO) and technique for structure optimization of a deterministic test pattern generator using Genetic Algorithm (GA). In digital integrated circuits, especially in sequential circuits, the Automatic Test Pattern Generation(ATPG) can be realized by using deterministic and simulated based algorithms. Generally the deterministic algorithms are time-wasting because a lots of backtracking is required.
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