Networking

Supporting Efficient Synchronization in Multi-Core NoCs Using Dynamic Buffer Allocation Technique

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Executive Summary

This paper explores a dynamic buffer allocation technique to guide distributed synchronization architecture to support efficient synchronization on multi-core Network-on-Chips (NoCs). The synchronization architecture features two physical buffers to be able to concurrently queue and handle synchronization requests issued by the local processor and remote processors via the on-chip network. Using the dynamic buffer allocation technique, the two physical buffers are dynamically allocated to form multiple virtual buffers in order to improve buffers' utilization. Experiments are carried on to evaluate buffers' utilization.

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