System-Level Design of a Delta-Sigma Modulator Target for Next Generation Wireless Application
Due to the increasing digital processing speed in the DSP, communication data is transferred in a channel bandwidth of 20 MHz according to the IEEE 802.11e standard. It is reasonable to believe that the signal bandwidth of the next generation wireless applications will be much higher than current one, which stimulates the requirement for high-speed building blocks. One of the key blocks in the front-end of the WLAN receiver is the Analog-to-Digital Converter (ADC). As a result, there is a stronger need for high resolution, high speed ADCs.