The System-Level Simplex Architecture for Improved Real-Time Embedded System Safety

Free registration required

Executive Summary

Embedded systems in safety-critical environments demand safety guarantees while providing many useful services that are too complex to formally verify or fully test. Existing application-level fault-tolerance methods, even if formally verified, leave the system vulnerable to errors in the Real-Time Operating System (RTOS), middleware, and microprocessor. The authors introduce the System-Level Simplex Architecture, which uses hardware/software co-design to provide fail operational guarantees for both logical application-level faults, as well as faults in previously dependent layers including the RTOS and microprocessor. They also provide an end-to-end design process for the System-Level Simplex Architecture where the AADL architecture description is automatically constructed and checked and the VHDL hardware code is generated.

  • Format: PDF
  • Size: 218.2 KB