To Reduce SRAM Sub-Threshold Leakage Using Stack and Zig-Zag Techniques
The growing market of portable electronics devices demands lesser power dissipation for longer battery life and compact system. Considerable attention has been given to the design of low-power and highperformance SRAMs since they are critical components in both high-performance processors and hand-held portable devices. The reduction of the threshold voltage due to voltage scaling leads to increase in sub threshold leakage current and hence static power dissipation. The leakage current consists of reverse-bias diode currents and sub threshold currents. Scaling down of threshold voltage results in exponential increase of the sub threshold leakage current.