Date Added: Jul 2014
In this paper, the authors propose a technique for software-implementation of an UART (Universal-Asynchronous-Receive-Transmit) with the goal of getting a customizable UART-core which can be used as a module in implementing a bigger system irrespective of one's choice of implementation platform. Here they have written the core in VHDL (VHSIC Hardware Description Language), implemented using XILINX ISE 10.1 design suite and tested in SPARTAN-3AN FPGA evaluation kit by interfacing a test circuit with the PC using the RS232 cable. The simulation results as well as the test results are seen to be satisfactory. The area taken and the power consumed are also evaluated.