VHDL Implementation of a MIPS RISC Processor

The implementation of 32 bit RISC processor with Microprocessor without Interlocked Pipeline Stages (MIPS) is presented. It was implemented in VHDL so as to reduce the instruction set present in the programmable memory. As the result the processor will contain the necessary logics for the implementation that requires fewer gates to be synthesized in the programmable matrix and has the capability to increase the speed of the target processor. Now-a-days, embedded microprocessors are used in a variety of electronic gadgets such as personal computers, cell phones, and robots.

Provided by: International Journal of Advanced Research in Computer Science and Software Engineering (IJARCSSE) Topic: Data Centers Date Added: Aug 2010 Format: PDF

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