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In this paper, the authors explore holistic approaches to hardware/software debug that use or integrate Transaction Level Models (TLMs). They present several TLM-based approaches to system-level diagnostics, ranging from use of most popular transaction level modeling languages through to hybrid technologies that combine TLMs with other well known diagnostic tools like in-silicon trace logic. System-level performance analysis, early software development and pre-silicion system verification are three popular use cases for transaction level models. In this paper, they review how TLMs can enhance system-level diagnostics - verification that occurs post-implementation.
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