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32-bit
(52 results)-
White Papers
Design and Verification of UART IP Core Using VMM
May 1, 2012 12:00am PDT
In the earlier era of electronics the UART (Universal Asynchronous Receiver/Transmitter) played a major role in data transmission. This UART IP CORE provides serial communication capabilities,...
Provided by: International Journal of Soft Computing and Engineering (IJSCE)
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White Papers
Approaches for the Performance Increasing of Software Implementation of Integer Multiplication in Prime Fields
March 30, 2012 12:00am PDT
The authors have proposed the approach to increase performance of software implementation of finite field multiplication algorithm, for 32-bit and 64-bit platforms. The approach is based on...
Provided by: International Association for Cryptologic Research
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White Papers
Cryptanalyzing of Message Digest Algorithms MD4 and MD5
March 1, 2012 12:00am PST
Hash functions are tools used in integrity of messages, digital signatures and digital time stamping. Message digest algorithms started with public key cryptography for authentication. Digest...
Provided by: Academy & Industry Research Collaboration Center
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White Papers
Low Power or High Performance? a Tradeoff Whose Time Has Come (and Nearly Gone)
February 20, 2012 12:00am PST
Some have argued that the dichotomy between high-performance operation and low resource utilization is false - an artifact that will soon succumb to Moore's Law and careful engineering. If such...
Provided by: Springer Science+Business Media
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White Papers
Design and Implementation of Pipelined 32-Bit Advanced RISC Processor for Various D.S.P Applications
January 30, 2012 12:00am PST
In this paper, the authors propose 32-bit pipelined RISC processor using VLIW architectures. This processor is especially used for both D.S.P applications and general purpose applications. Reduced...
Provided by: International Journal of Computer Science and Information Technologies
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White Papers
A High-Throughput ASIC implementation of Configurable Advanced Encryption Standard (AES) Processor
January 5, 2012 12:00am PST
In this paper, a compact and fully pipelined ASIC implementation of AES cryptography algorithm has been presented. The proposed implementation is configurable to take 128, 192 and 256-bit keys...
Provided by: International Journal of Computer Applications
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White Papers
Diffusion Filters as a Flexible Architecture for Event Notification in Wireless Sensor Networks
January 1, 2012 12:00am PST
Wireless sensor networks represent an increasingly important example of distributed event systems. Unlike Internet-based distributed event systems, sensor networks are very bandwidth constrained...
Provided by: University of California
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White Papers
SHA-3 on ARM11 Processors
November 25, 2011 12:00am PST
This paper presents high-speed assembly implementations of the 256-bit-output versions of all five SHA-3 finalists and of SHA-256 for the ARM11 family of processors. The authors report new speed...
Provided by: National Taiwan University
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White Papers
A Pragmatic Guide to Moving to IPv6
August 1, 2011 12:00am PDT
IPv6 is here! Steady growth in mobile devices and whirlwind Internet adoption in emerging markets will exhaust available IPv4 addresses soon. By moving from 32-bit to 128-bit IP addresses, IPv6...
Provided by: Citrix Systems, Inc.
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White Papers
Performance Estimation of Novel 32-Bit and 64-Bit RISC Based Network Processor Cores
June 14, 2011 12:00am PDT
The rapid expansion of computer networks in number of users, servers, connections and demands for new applications, services and protocols, along with the tremendous growth in data traffic has...
Provided by: Institute of Electrical and Electronics Engineers
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White Papers
On the Construction of Digest Functions for Manual Authentication Protocols
March 8, 2011 12:00am PST
A digest function is a sort of universal hash that takes a key and a message as its inputs. This paper will study these functions' properties and design in the context of their application in...
Provided by: Oxford University Computing Services (OUCS)
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White Papers
An Improved Algebraic Attack on Hamsi-256
January 19, 2011 12:00am PST
Hamsi is one of the 14 second-stage candidates in NIST's SHA-3 competition. The only previous attack on this hash function was a very marginal attack on its 256-bit version published by Thomas...
Provided by: Weizmann Institute of Science
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White Papers
A 5.42nW/kB Retention Power Logic-Compatible Embedded DRAM With 2T Dual-Vt Gain Cell for Low Power Sensing Applications
January 13, 2011 12:00am PST
A logic-compatible 2T dual-Vt embedded DRAM (eDRAM) is proposed for ultra-small sensing systems to achieve 8× longer retention time, 5× lower refresh power and 30% reduced area compared with the...
Provided by: University of Michigan
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White Papers
Low-Leakage Repeaters for NoC Interconnects
January 1, 2011 12:00am PST
Several low-leakage repeater circuits for Network-on-Chip (NoC) interconnects are presented and analyzed for various utilization rates. The recently proposed Staggered-VT (SVT) repeater is...
Provided by: Israel Institute of Technology
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White Papers
Java Development Guide for Mac OS X
October 20, 2010 12:00am PDT
The Java Platform, Standard Edition for Mac OS X provides a Java environment that is highly integrated with Mac OS X. This integration brings together the Java platform's versatility and Mac OS...
Provided by: Apple
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White Papers
Comparison of Seven SHA-3 Candidates Software Implementations on Smart Cards
October 1, 2010 12:00am PDT
In this work, the authors present and compare seven SHA-3 second-round candidates implementations on two different architectures used on smart cards: the Intel 8051 and the ARM7TDMI. After...
Provided by: Oberthur Technologies
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White Papers
Improved Trace-Driven Cache-Collision Attacks against Embedded AES Implementations
September 23, 2010 12:00am PDT
In this paper the authors present two attacks that exploit cache events, which are visible in some side channel, to derive a secret key used in an implementation of AES. The first is an...
Provided by: University of Bristol
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White Papers
An Area-Efficient Dynamically Reconfigurable Spatial Division Multiplexing Network-on-Chip With Static Throughput Guarantee
September 14, 2010 12:00am PDT
With an increasing trend to implement Network-on-Chip (NoC)-based Multi-Processor Systems-on-Chips (MPSoCs), NoCs need to have guaranteed services and be dynamically reconfigurable. Many current...
Provided by: National University of Singapore
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White Papers
Adaptive Data Aggregation for Wireless Sensor Networks
May 5, 2010 12:00am PDT
Wireless sensor nodes typically have limited processing capabilities and are powered by batteries. The amount of energy expended in transmitting a single data bit would be several orders of...
Provided by: Missouri University of Science and Technology
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White Papers
How to Install the Oracle Solaris 10 Operating System on x86 Systems
April 1, 2010 12:00am PDT
This white paper instructs users unfamiliar with the Oracle Solaris 10 operating system installation on how to install Oracle Solaris 10 on an Oracle supported x86 system (including the family of...
Provided by: Oracle
