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multi-threading
(463 results)-
Whitepapers
Analysis of IDS for Cloud Computing
March 1, 2013 12:00am PST
This paper is on approach for obtaining optimal number of features to build an efficient model for Intrusion Detection System (IDS). Most Intrusion Detection Systems (IDSs) are designed to handle...
Provided by: International Journal of Application or Innovation in Engineering & Management (IJAIEM)
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Whitepapers
JESSICA2: A Distributed Java Virtual Machine With Transparent Thread Migration Support
January 1, 2013 12:00am PST
A distributed Java Virtual Machine (DJVM) spanning multiple cluster nodes can provide a true parallel execution environment for multi-threaded Java applications. Most existing DJVMs suffer from...
Provided by: University of Hohenheim
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Whitepapers
A Multi-Channel Signal Sources Based on FPGA and DDS
November 30, 2012 12:00am PST
In the field of test & control instrument, multi-channel signal sources are needed as the excitation in the electrical parameters measurement. This paper presents a realization method of...
Provided by: JATIT
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Whitepapers
Multi-Threaded ASP Solving with Clasp
October 11, 2012 12:00am PDT
The authors present the new multi-threaded version of the state-of-the-art answer set solver clasp. They detail its component and communication architecture and illustrate how they support the...
Provided by: Simon Fraser
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Whitepapers
Implementation of Register Files in the Processor of Hard Real Time Systems for Context Switching
September 1, 2012 12:00am PDT
Real time systems like Flight control systems require very precise timing; multi threading itself becomes an overhead cost mainly due to context switching of the Real-Time Operating System (RTOS)....
Provided by: IJCER
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Whitepapers
Performance Evaluation of Multi-Threaded System Vs. Chip-Multi-Processor System
August 1, 2012 12:00am PDT
The purpose of this paper is to analyze and compare the performance of multi-threaded system and chip-multi-processor system. Currently, various types of multi-core and multi-threaded processors...
Provided by: International Journal of Computer Technology and Electronics Engineering
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Whitepapers
MTCLASS: Traffic Classification on High-Speed Links With Commodity Hardware
May 24, 2012 12:00am PDT
Statistical traffic classification on high-speed, multi-Gb/s links has up to now been possible only with specialized, often proprietary, always quite costly hardware. In this paper, the authors...
Provided by: University of Bremen
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Whitepapers
Delay Analysis for Ethernet Long-Reach Passive Optical Networks
May 24, 2012 12:00am PDT
Designing low latency polling schemes is one of the most important parts for Passive Optical Networks (PONs), particularly for Long-Reach PONs (LR-PON) which suffer from long propagation delays....
Provided by: Institute of Electrical & Electronic Engineers
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Whitepapers
Intrusion Detection System for Cloud Computing
May 1, 2012 12:00am PDT
Providing security in a distributed system requires more than user authentication with passwords or digital certificates and confidentiality in data transmission. Distributed model of cloud makes...
Provided by: International Journal of Scientific & Technology Research
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White Papers
Impact of the Use of Object Request Broker Middleware for Inter-Component Communications in C6416 Digital Signal Processor Based Software Communications Architecture Radio Systems
April 5, 2012 12:00am PDT
Software Communications Architecture (SCA), ORB middleware, ORB express DSP, inter-component communications, stub code, encoding, marshalling are necessary in order to meet the requirements of a...
Provided by: Science Publications
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White Papers
Sound and Precise Analysis of Parallel Programs Through Schedule Specialization
March 26, 2012 12:00am PDT
Parallel programs are known to be difficult to analyze. A key reason is that they typically have an enormous number of execution inter-leavings, or schedules. Static analysis over all schedules...
Provided by: Association for Computing Machinery
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Whitepapers
Data Sharing in MultiThreaded Applications and Its Impact on Chip Design
February 10, 2012 12:00am PST
Analytical modeling is becoming an increasingly important technique used in the design of chip multiprocessors. Most such models assume multi-programmed workload mixes and either ignore or...
Provided by: North Carolina State University
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White Papers
Concurrency Without Locking in Parallel Hash Structures Used for Data Processing
January 30, 2012 12:00am PST
Various mechanisms providing mutual exclusion and thread synchronization can be used to support parallel processing within a single computer. Instead of using locks, semaphores, barriers or other...
Provided by: Budapest University of Technology and Economics
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White Papers
Static Lock Capabilities for Deadlock Freedom
January 28, 2012 12:00am PST
The authors present a technique - lock capabilities - for statically verifying that multi-threaded programs with locks will not deadlock. Most previous work on deadlock prevention requires a...
Provided by: Association for Computing Machinery
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Whitepapers
Face Detection CUDA Accelerating
January 25, 2012 12:00am PST
Face detection is very useful and important for many different disciplines. Even for the people future work, where the face detection will be used, the authors wanted to determine, whether it is...
Provided by: IARIA
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White Papers
Extending Multicore Architectures to Exploit Hybrid Parallelism in Single-Thread Applications
January 1, 2012 12:00am PST
Chip multiprocessors with multiple simpler cores are gaining popularity because they have the potential to drive future performance gains without exacerbating the problems of power dissipation and...
Provided by: University of Michigan
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White Papers
Performance Evaluation of Dynamic Speculative Multithreading With the Cascadia Architecture
January 1, 2012 12:00am PST
Thread-Level Parallelism (TLP) has been extensively studied in order to overcome the limitations of exploiting Instruction-Level Parallelism (ILP) on high-performance superscalar processors. One...
Provided by: Institute of Electrical and Electronics Engineers
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White Papers
Maestro: Balancing Fairness, Latency and Throughput in the OpenFlow Control Plane
December 20, 2011 12:00am PST
The fundamental feature of an OpenFlow network is that the controller is responsible for the configuration of switches for every traffic flow. This feature brings programmability and flexibility,...
Provided by: Rice University
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Webcasts
Cooperative Concurrency for a Multicore World
December 8, 2011 12:00am PST
Multi-threaded programs are notoriously prone to unintended interference between concurrent threads. To address this problem, these presenters argue that yield annotations in the source code...
Provided by: University of Washington
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Whitepapers - Video
SPARC T4 Processor Design and Benefits
December 1, 2011 12:00am PST
The previous design of the SPARC processors focused on throughput, specifically designed for threaded applications. The latest generation, the T4, has an updated core that markedly increases...
Provided by: Oracle
