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processors
(2094 results)-
White Papers
Energy Efficient Target Tracking Algorithm Based on Sleep Scheduling in Wireless Sensor Networks
May 25, 2012 12:00am PDT
With the recent technology improvement of Micro-Electro-Mechanical Systems (MEMS), large-scale wireless sensor networks are envisioned to be widely applied in various applications such as...
Provided by: AICIT
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White Papers
Introducing the Next Generation of SPARC Servers E-Book
May 1, 2012 12:00am PDT
Fast, Scalable, Secure, Integrated, Optimized - discover the benefits of Oracle's new SPARC T4 servers and how they deliver world record performance for a wide range of enterprise applications,...
Provided by: Oracle
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White Papers
Cachecompression Techniques
May 1, 2012 12:00am PDT
The proliferation of Chip MultiProcessors (CMPs) has led to the integration of large on-chip caches. With increasing number of cores and cache banks integrated on a single die, the on-chip network...
Provided by: MIT College Of Engineering
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White Papers
An AES Evaluation for 2.4GHz Wireless Network Based on SOPC
May 1, 2012 12:00am PDT
In modern systems, data security is needed more than ever before and many cryptographic algorithms are utilized for security services. Wireless Sensor Networks (WSN) is an example of such...
Provided by: AICIT
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White Papers
Design of a Wireless Fingerprint Authentication Service Platform Using the SOPC Technology
May 1, 2012 12:00am PDT
Fingerprint authentication is becoming an important security requirement in various embedded systems. While traditional identification method, user ID plus password cannot satisfy users' needs due...
Provided by: AICIT
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White Papers
A One-Shot Dynamic Optimization Methodology and Application Metrics Estimation Model for Wireless Sensor Networks
April 30, 2012 12:00am PDT
Wireless Sensor Networks (WSNs), consisting of autonomous sensor nodes, have emerged as ubiquitous networks that span diverse application domains (e.g., health care, logistics, defense) each with...
Provided by: IARIA
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White Papers
Pillar Axiom 600 - System Overview and Architecture
April 25, 2012 12:00am PDT
IT executives need to leverage applications to give themselves a competitive edge - and do so in a way that dynamically matches changing business priorities. Because faster drives and faster...
Provided by: Oracle
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White Papers
On the Communication Complexity of 3D FFTs and Its Implications for Exascale
April 18, 2012 12:00am PDT
This paper revisits the communication complexity of large-scale 3D Fast Fourier Transforms (FFTs) and asks what impact trends in current architectures will have on FFT performance at exascale. The...
Provided by: Association for Computing Machinery
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White Papers
Lane Decoupling for Improving the Timing-Error Resiliency of Wide-SIMD Architectures
April 15, 2012 12:00am PDT
A significant portion of the energy dissipated in modern integrated circuits is consumed by the overhead associated with timing guard-bands that ensure reliable execution. Timing speculation,...
Provided by: Institute of Electrical and Electronics Engineers
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White Papers
Impact of the Use of Object Request Broker Middleware for Inter-Component Communications in C6416 Digital Signal Processor Based Software Communications Architecture Radio Systems
April 5, 2012 12:00am PDT
Software Communications Architecture (SCA), ORB middleware, ORB express DSP, inter-component communications, stub code, encoding, marshalling are necessary in order to meet the requirements of a...
Provided by: Science Publications
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White Papers
Reagents: Expressing and Composing Fine-Grained Concurrency
April 4, 2012 12:00am PDT
Efficient communication and synchronization is crucial for fine-grained parallelism. Libraries providing such features, while indispensable, are difficult to write, and often cannot be tailored or...
Provided by: Association for Computing Machinery
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White Papers
Managing Macs in a Windows Environment
April 1, 2012 12:00am PDT
Computer networks are more diverse than ever. A homogeneous environment of only windows or Mac devices is a rarity. Multi-platform computing environments are the norm and require a complex it...
Provided by: Absolute Software
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White Papers
Design of Cache Controller for Multi-Core Processor System
April 1, 2012 12:00am PDT
To meet the growing needs of computing power, communication speed and performance requirements demanded by today's applications, processor clock speed has to be increased. However, increasing...
Provided by: G.H. Raisoni College of Engineering
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White Papers
To Reduce SRAM Sub-Threshold Leakage Using Stack and Zig-Zag Techniques
April 1, 2012 12:00am PDT
The growing market of portable electronics devices demands lesser power dissipation for longer battery life and compact system. Considerable attention has been given to the design of low-power and...
Provided by: International Journal of Scientific Engineering and Technology
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White Papers
Very Large Scale Optical Interconnect Systems For Different Types of Optical Interconnection Networks
April 1, 2012 12:00am PDT
The need for scalable systems in market demands in terms of lower computing costs and protection of customer investment in computing: scaling up the system to quickly meet business growth is...
Provided by: mecs-press
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White Papers
Leveraging Core Specialization Via OS Scheduling to Improve Performance on Asymmetric Multicore Systems
April 1, 2012 12:00am PDT
Asymmetric Multicore Processors (AMPs) consist of cores with the same ISA (instruction-set architecture), but different micro-architectural features, speed, and power consumption. Because cores...
Provided by: Association for Computing Machinery
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White Papers
An Overview to Software Architecture in Intrusion Detection System
March 31, 2012 12:00am PDT
Network intrusion detection systems provide proactive defense against security threats by detecting and blocking attack-related traffic. This task can be highly complex, and therefore,...
Provided by: International Journal of Soft Computing and Engineering (IJSCE)
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White Papers
Reinforcement Learning Algorithm for Supporting Virtual Routers on Multiprocessor System
March 30, 2012 12:00am PDT
With the development of CPU architecture and virtual networks, it is urgent to propose algorithms which can support lots of virtual routers on a multiprocessor system, and solve the problems of...
Provided by: AICIT
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White Papers
SAFER: System-Level Architecture for Failure Evasion in Real-Time Applications
March 16, 2012 12:00am PDT
The authors propose a layer called SAFER (System-level Architecture for Failure Evasion in Real-time applications) to incorporate configurable task-level fault-tolerance features such as Hot...
Provided by: Carnegie Mellon University
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White Papers
Configurable M-Factor VLSI DVB-S2 LDPC Decoder Architecture With Optimized Memory Tiling Design
March 9, 2012 12:00am PST
Semi-parallel architectures for decoding Digital Video Broadcasting-Satellite 2 (DVB-S2) Low-Density Parity-Check (LDPC) codes have improved Very Large Scale Integration (VLSI) solutions, but...
Provided by: EURASIP
