A 1GHz Direct Digital Frequency Synthesizer Based on the Quasi-Linear Interpolation Method

The paper presents a novel architecture for a Direct Digital Frequency Synthesizer (DDFS) based on the Quasi-Linear InterPolation (QLIP) method. The four-segment QLIP is utilized to realize a DDFS with a Spurious Free Dynamic Range (SFDR) of 63.2dBc. Direct Digital Frequency Synthesizers (DDFS) play a very important role in modern digital communication systems. They are essential parts in Spread Spectrums such as Bluetooth devices and Radars due to their high speed frequency hopping capability, fine frequency resolution, and very short settling times. The main challenge in their design is reducing their chip area and power consumption as well as increasing their clock frequency.