A Novel Reconfigurable Processor Using Dynamically Partitioned SIMD for Multimedia Applications
In this paper, the authors propose a novel reconfigurable processor using Dynamically Partitioned Single-Instruction Multiple-Data (DP-SIMD) which is able to process multimedia data. The SIMD processor and Parallel SIMD (P-SIMD) processor, which is composed of a number of SIMD processors, are usually used these days. But these processors are inefficient because all Processing Units (PUs) should process the same operations all the time. Moreover, the PUs can process different operations only when every SIMD group operation is predefined. They propose a processor control method which can partition parallel processors into multiple SIMD-based processors dynamically to enhance efficiency.