Achieving One TeraFLOPS With 28-nm FPGAs
Source: Altera
Due to recent technological developments, high-performance floating-point signal processing can, for the first time, be easily achieved using FPGAs. To date, virtually all FPGA-based signal processing has been implemented using fixed-point operations. This white paper describes how floating-point technology on FPGAs is not only practical now, but that processing rates of one trillion floating-point operations per second (teraFLOPS) are feasible - and on a single FPGA die.
| Format: | Size: | 630.60 | |
| Date: | Sep 2010 |



