An Energy and Power Consumption Analysis of FPGA Routing Architectures
Source: Miami University of Ohio
In this paper, the authors evaluate bi-directional and unidirectional FPGA routing architectures in terms of energy and power consumption using an updated power estimation framework compatible with VPR 5.0. The goal of this research is to help FPGA vendors find the best FPGA architectures. Initially, they make some general observations on how two types of routing architectures affect speed, area consumption, and power consumption. They observe how routing buffer sizing affects both the critical path delay and power and energy consumption of FPGAs with certain routing architectures.