Bipartition of VLSI Circuits Using Simulated Annealing Technique
The bi-partitioning of VLSI circuit is made using simulated annealing algorithm. The parameters used in annealing process are initial temperature, cooling rate and threshold (maximum number of iterations). The circuit is partitioned in two partitions and number of interconnections is find out between two partitions. The number of interconnection between two partitions is called as cut-size (number of branches cut by partition). Further, the nodes of two partitions are swapped between two partitions to find the minimum cut-size. Iterations will go on using simulated annealing optimization technique. With a proper choice of the initial temperature and the cooling rate the people can obtain a good.