Computationally Efficient Analytical Crosstalk Noise Model in RC Interconnects

In this paper, then authors present an accurate, fast and simple closed form solution to estimate crosstalk noise between two adjacent wires, using RC interconnect model in two situations: simple resistance as driver and short channel CMOS inverter as a driver. The salient features of their proposed models include minimization of computational overhead, elimination of adjustment step to predict the peak amplitude and pulse width of the noise waveform. Numerical calculations are compared with SPICE simulation and other metrics by plotting the noise voltage verses time. Based on their proposed models, they derive analytical delay models due to RC interconnect in each case.