Design and Evaluation of Mesh-of-Tree Based Network-on-Chip for Two- and Three-Dimensional Integrated Circuits

This paper presents an in-depth study of Mesh-of-Tree (MoT) topology and its application in Network-on-Chip (NoC) design for both 2-D and 3-D ICs. The performance and cost of the MoT network have been evaluated and compared with other well established topologies in NoC paradigm under self-similar traffic and a set of real benchmark applications. From simulation results, the paper establishes MoT to be a strong contender in designing the communication infrastructure of 2-D and 3-D NoC.