Design and Implementation of PCM Decommutator on a Single FPGA
Source: International Journal of Advanced Research in Computer and Communication Engineering (IJARCCE)
After frame synchronization, individual measurands are identified according to the frame location. The decommutator identifies and extracts Embedded Asynchronous Data Stream (EADS) words. Thus PCM Decommutator is a very crucial subsystem in the satellite data acquisition unit of satellite ground station. A PCM decommutator is designed and implemented on a stratix FPGA. The Hardware design comprises of four modules; Decommutator, FPGA on chip memory bank, Data storage on external FIFO banks and PCI-X master IP core integrated on the same FPGA. Decommutator will identify and separate the individual parameters from the incoming satellite PCM stream.