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asics - chip sets
(377 results)-
White Papers
Intel IT Executive Insights: Intel IT's Cloud Computing Strategy
Jan 2012
Cloud computing is only growing and innovating and at Intel, it's one of their top 3 IT objectives for 2012. The idea of a virtualized data center is changing the way Intel looks at its...
Provided by Intel Corporation
-
White Papers
New Intel® Atom™ Dev SDK brings enhancements & component integration
Jun 2010
The Intel® Atom™ Developer Program has just released Beta 3 of its Windows SDK. With this new release, there are a number of enhancements to assist with application development, and it offers a...
Provided by Intel
-
White Papers
Intel brings new experiences to life via Cloud Computing
Dec 2011
It seems that today's cloud technology is constantly pushing the envelope of what is or isn't possible in computing. Something as simple as putting a few letters into a search engine and getting...
Provided by Intel Corporation
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White Papers
Inside Intel IT on Cloud Computing and Security
Jan 2012
Certainly no one expects that a company like Intel doesn't have issues when it comes to computing in the cloud, they do by the way. The real question is, how do they handle them, what are Intel...
Provided by Intel Corporation
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White Papers
OFDM Receiver Design
Dec 2000
Othogonal Frequency Division Multiplex (OFDM) has gained considerable attention in recent years. It has been adopted for various standards include the 802.11a wireless LAN standard. In this...
Provided by Regents of the University of California
-
White Papers
Windows 7 - Mobile Broadband Certification for Existing Chipsets
Mar 2009
This paper provides information about Windows 7 support for Mobile Broadband. It provides guidelines for hardware manufacturers, original equipment manufacturers, and mobile network operators on...
Provided by Microsoft
-
White Papers
Power Improvements on 2008 Desktop Platforms
Oct 2008
This paper presents platform- and silicon component power data that demonstrate advances in desktop platform power management enabled on 2008 platforms, built with the Intel Q45 Express Chipset,...
Provided by Intel
-
White Papers
Consolidating DSS Workloads on Dell PowerEdge 11G Servers Using Oracle 11g Database Replay
Apr 2009
Any server consolidation project must be preceded by a well-planned effort to predict the energy consumption and performance capacity of the new platform as compared to the legacy environment....
Provided by Dell
-
White Papers
Performance Report PRIMERGY RX300 S4
Dec 2007
The PRIMERGY RX300 S4 is a space-saving dual socket rack server which takes up just 2 height units and replaces the PRIMERGY RX300 S3. It has an Intel 5000P chipset, two Intel Dual-Core or...
Provided by Fujitsu Siemens
-
White Papers
Windows ACPI Emulated Devices Table
Apr 2009
Modern PC platforms often use devices that have known errata. In this case, the Windows family of operating systems may include mechanisms to work around these known errata whenever possible. Two...
Provided by Microsoft
-
White Papers
Performance Advantage of Dell PowerEdge R900 over HP DL585 Running Microsoft Hyper-V
Sep 2008
Information Technology organizations are finding that combining today's industry standard servers based on multi-core processors with server virtualization can create highly efficient solutions. A...
Provided by Dell
-
White Papers
Three Easy Ways To Achieve and Understand WAN Acceleration with TCP Applications
Feb 2010
A major problem with file transmission between two or more points results from latency, which comes from various sources, including the hardware (switches, routers) and the media that you are...
Provided by Global Knowledge
-
Tools & Templates
Intel® Atom™ Developer Program's Million Dollar Developer Fund
Mar 2010
Netbooks' mobility and smaller screen sizes demand applications that are optimized for a mobile, on-the-go audience. The Intel Atom Developer Program Million Dollar Development Fund helps...
Provided by Intel
-
White Papers
Optimizing Power Distribution for High-Density Computing
Apr 2010
Choosing the right power distribution units for today and preparing for the future Fueled by the rapid rise of technologies such as virtualization and blade servers, computing densities in...
Provided by Eaton
-
White Papers
SCOC3: A Space Computer on a Chip - An Example of Successful Development of a Highly Integrated Innovative ASIC
Feb 2010
This paper presents the definition of an integrated processor core ASIC named SCOC3 which is designed for space computers. It also presents the validation method that has led to a successful ASIC...
Provided by Economic Development Association of Alabama
-
White Papers
Achieving One TeraFLOPS With 28-nm FPGAs
Sep 2010
Due to recent technological developments, high-performance floating-point signal processing can, for the first time, be easily achieved using FPGAs. To date, virtually all FPGA-based signal...
Provided by Altera
-
White Papers
Fulfilling Technology Needs for 40G-100G Network-Centric Operations and Warfare
Sep 2010
The development and deployment of Network-Centric Operations and Warfare (NCOW) to integrate and connect the military's many separate networks relies on high-speed packet transport and optical...
Provided by Altera
-
White Papers
Board Design Guidelines for LVDS Systems
Sep 2010
LVDS is a high-speed, low-voltage, low-power, and low-noise general-purpose I/O interface standard. The low-voltage swing and differential current mode outputs significantly reduce Electromagnetic...
Provided by Altera
-
White Papers
Implementing FIR Filters and FFTs With 28-nm Variable-Precision DSP Architecture
Sep 2010
Across a range of applications, the two most common functions implemented in FPGA-based high-performance signal processing are Finite Impulse Response (FIR) filters and fast Fourier transforms...
Provided by Altera
-
White Papers
Guaranteeing Silicon Performance With FPGA Timing Models
Aug 2010
How can a designer accurately predict the time delays of a fully customizable integrated circuit? The answer to this question is "Not very easily." There are many factors that limit and increase...
Provided by Altera
-
White Papers
Enhancing Robust SEU Mitigation With 28-nm FPGAs
Jul 2010
Systems designed with FPGAs benefit from significant improvements over ASICS, such as rapid-process technology scaling and design innovation, which permit the use of FPGAs in high-availability,...
Provided by Altera
-
White Papers
Medical Imaging Implementation Using FPGAs
Jul 2010
Earlier prediction and treatment are driving the fusion of modalities such as Positron Emission Tomography (PET)/Computerized Tomography (CT) and X-ray/CT equipment. The higher image resolutions...
Provided by Altera
-
White Papers
Addressing 100-GbE Line-Card Design Challenges on 28-nm FPGAs
Jul 2010
As various standard bodies finalize their 100G standards for transport, Ethernet, and optical interfaces, FPGAs play a vital role for early adopters of technology who want to design 100G...
Provided by Altera
-
White Papers
Increasing Design Functionality With Partial and Dynamic Reconfiguration in 28-nm FPGAs
Jul 2010
The density of FPGAs has grown with each process node shrink. Compared to previous generations of FPGAs, the extra density, coupled with features such as reconfiguration, enables designers to add...
Provided by Altera
-
White Papers
Innovating With a Full Spectrum of 40-nm FPGAs and ASICs With Transceivers
Jul 2010
Increasing bandwidth requirements for broadband services are driving silicon vendors to use more and more high-speed serial transceivers. Therefore, next-generation applications feature a wide...
Provided by Altera
-
White Papers
Integrating 100-GbE Switching Solutions on 28-nm FPGAs
Jul 2010
With high-speed 100-GbE communication network standards converging, switching functions play a key role in the smooth functioning of the Internet. The aggregated network traffic doubles every six...
Provided by Altera
-
White Papers
Understanding 40-nm FPGA Solutions for SATA/SAS
Jul 2010
Serial ATA (SATA) and Serial Attached SCSI (SAS) are computer bus standards that have the primary function of transferring data (directly or otherwise) between the motherboard and mass storage...
Provided by Altera
-
White Papers
Accelerating DSP Designs With the Total 28-nm DSP Portfolio
Jul 2010
Implementing Digital Signal Processing (DSP) datapaths with different performance, precision, Intellectual Property (IP), and development flows is challenging and labor-intensive. As more and more...
Provided by Altera
-
White Papers
Building an IP Surveillance Camera System With a Low-Cost FPGA
Jun 2010
In the video surveillance marketplace, the need for higher quality video, higher resolution, and more flexibility and features is driving the change from analog to digital cameras. By definition,...
Provided by Altera
-
White Papers
Boosting System Performance With External Memory Solutions
Jun 2010
Over 70% of designs on Altera FPGAs require some type of external memory in the design, but the needs vary depending on the individual application. This white paper addresses all aspects of...
Provided by Altera
-
White Papers
Enabling Low-Power EO/IR System Development With FPGAs and Image- and Sensor-Processing IP
Jun 2010
Before embarking on the development of a next-generation Electro-Optical and Infrared (EO/IR) system, it is important to not only understand the power and performance characteristics of the FPGA,...
Provided by Altera
-
White Papers
Enabling High-Precision DSP Applications With the FPGA Industry's First Variable-Precision Architecture
May 2010
The silicon Digital Signal Processing (DSP) architecture of the FPGA can make a big difference when implementing complex signal-processing algorithms. Altera's Stratix V FPGAs, with the...
Provided by Altera
-
White Papers
Extending Transceiver Leadership at 28 nm
May 2010
High-speed serial protocols with increased data rates and expanded capabilities are addressing the demand for more network bandwidth. Efficiently supporting the subsequent increase in system...
Provided by Altera
-
White Papers
Enabling Improved Image Format Conversion With FPGAs
Apr 2010
Broadcast infrastructure systems - such as servers, switchers, head-end encoders, and specialty studio displays - support a multitude of input image formats, and commonly require images to be...
Provided by Altera
-
White Papers
Driving Flexibility Into Automotive Electronics Design
Mar 2010
With the dramatic increase in development costs for state-of-the-art process technologies, such as next-generation automotive electronic systems, specialization of traditional microcontrollers no...
Provided by Altera
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White Papers
Developing Functional Safety Systems With TÜV-Qualified FPGAs
Mar 2010
This white paper discusses how market trends, the need for increased productivity, and new legislation have accelerated the use of safety systems in industrial machinery. This TÜV-qualified FPGA...
Provided by Altera
-
White Papers
Using 10-Gbps Transceivers in 40G/100G Applications
Feb 2010
This white paper identifies the key drivers behind the migration to 100G interfaces, and shows how to leverage the unique ability of FPGAs to implement this high-speed interface. The emerging...
Provided by Altera
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White Papers
Supporting Digital Television Trends With Next-Generation FPGAs
Feb 2010
The proliferation of so many different digital television models-better known as market fragmentation- and differing regional market requirements, combined with the desire to add new features and...
Provided by Altera
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White Papers
Decrease Total System Costs with Industry's Lowest Cost, Lowest Power FPGAs
Nov 2009
Corporate objectives, such as increasing profits and sales revenue while utilizing R&D efficiently, are putting severe pressure on today's design engineering teams. The resulting system level...
Provided by Altera
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White Papers
Taking Advantage of Advances in FPGA Floating-Point IP Cores
Oct 2009
Recently available FPGA design tools and IP provide a substantial reduction in computational resources, as well as greatly easing the implementation effort in a floating-point datapath. Moreover,...
Provided by Altera
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White Papers
CTC Turbo Decoding Architecture for LTE Systems Implemented on FPGA
Feb 2012
This paper describes a turbo decoder for Long Term Evolution (LTE) standard, release 8, using a Max Log MAP algorithm. The Forward Error Correction (FEC) block dimensions, as indicated in the...
Provided by IARIA
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White Papers
Design and Optimization of Full Comparator Based on Quantum-Dot Cellular Automata
Apr 2012
Quantum-dot Cellular Automata (QCA) is one of the few alternative computing platforms that has the potential to be a promising technology because of higher speed, smaller size, and lower power...
Provided by ETRI Journal
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White Papers
FPGA Real Time Acceleration for Discrete Wavelet Transform of the 5/3 Filter for JPEG2000 Standard
Mar 2012
In recent years video and image compression have became very required. The availability of powerful software design tools is a fundamental requirement to take advantage of the many advanced and...
Provided by Academy & Industry Research Collaboration Center
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White Papers
A Methodology for Constraint-Driven Synthesis of On-Chip Communications
Mar 2009
The authors present a methodology and an optimization framework for the synthesis of on-chip communication through the assembly of components such as interfaces, routers, buses and links, from a...
Provided by Institute of Electrical and Electronics Engineers
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White Papers
Distributed Flit-Buffer Flow Control for Networks-on-Chip
Oct 2008
The combination of flit-buffer flow control methods and latency-insensitive protocols is an effective solution for Networks-on-Chip (NoC). Since they both rely on backpressure, the two techniques...
Provided by Association for Computing Machinery
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White Papers
CTC: An End-to-End Flow Control Protocol for Multi-Core Systems-on-Chip
May 2009
The authors propose Connection Then Credits (CTC) as a new end-to-end flow control protocol to handle message-dependent deadlocks in Networks-on-Chip (NoC) for multi-core systems-on-chip. CTC is...
Provided by Institute of Electrical and Electronics Engineers
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White Papers
Sampling Correlation Sources for Timing Yield Analysis of Sequential Circuits With Clock Networks
Jun 2011
Analyzing timing yield under process variations is difficult because of the presence of correlations. Reconvergent Fan-Out Nodes (RFONs) within combinational subcircuits are a major source of...
Provided by World Scientific Publishing
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White Papers
High Speed and Low Power Dynamic Latched Comparator for PTL Circuit Applications
Jan 2012
Comparators are basic building blocks for designing modern mixed signal systems. Speed and resolution are two important factors which are required for high speed applications. This paper presents...
Provided by International Journal of Computer Science and Information Technologies
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White Papers
Integrating Logic Analyzer Functionality Into VHDL Designs
Jan 2012
A combined hardware and software system for the debugging of FPGA designs is designed. It provides a powerful logic analyzer implemented as a fully parameterized VHDL description. The system can...
Provided by International Journal of Computer Science and Information Technologies
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White Papers
Implementation of Area Efficient Memory-Based FIR Digital Filter Using LUT-Multiplier
Mar 2012
Memory based structures are well-suited for many Digital Signal Processing (DSP) applications, which involve multiplication with a fixed set of coefficients. Memory-based structures are more...
Provided by International Journal of Computer Science and Information Technologies
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White Papers
VLSI Implementation of Fast Convolution Based 2-D Discrete Wavelet Transform for High Speed, Area Efficient Image Computing
Mar 2012
A VLSI design approach of a high speed and real-time 2-D Discrete Wavelet Transform computing is being presented in the paper. The proposed architecture, based on new and fast convolution...
Provided by International Journal of Power Control Signal and Computation (IJPCSC)
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White Papers
LFSR Test Pattern for Fault Detection and Diagnosis for FPGA CLB Cells
Mar 2012
The increasing growth of sub-micron technology has resulted in the difficulty of VLSI testing. Test and design for testability are recognized today as critical to a successful design. Field...
Provided by International Journal of Advances in Engineering & Technology (IJAET)
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White Papers
Efficient Implementations of Discrete Wavelet Transforms Using FPGAs
Sep 2011
Recently, the Wavelet Transform has gained a lot of popularity in the field of signal and image processing. This is due to its capability of providing both time and frequency information...
Provided by International Journal of Advances in Engineering & Technology (IJAET)
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White Papers
Analog Integrated Circuit Design and Testing Using the Field Programmable Analog Array Technology
Sep 2011
Due to their reliability, performance and rapid prototyping, programmable logic devices overcome the use of ASICs in the digital system design. However, the similar solution for analog signals was...
Provided by International Journal of Advances in Engineering & Technology (IJAET)
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White Papers
Groestl Tweaks and Their Effect on FPGA Results
Nov 2011
The authors have performed the first order analysis of the influence of the Round 3 tweaks in Groestl on the performance of this algorithm in FPGAs. Both Groestl-0 and the revised Groestl have...
Provided by George Mason University
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White Papers
Random Number Generation Based on Oscillatory Metastability in Ring Circuits
Nov 2011
Random number generator designs are discussed, which utilize oscillatory metastability, induced by switching between two stable states of ring-connected digital gates. For a short time after the...
Provided by International Association for Cryptologic Research
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White Papers
Configurable M-Factor VLSI DVB-S2 LDPC Decoder Architecture With Optimized Memory Tiling Design
Mar 2012
Semi-parallel architectures for decoding Digital Video Broadcasting-Satellite 2 (DVB-S2) Low-Density Parity-Check (LDPC) codes have improved Very Large Scale Integration (VLSI) solutions, but...
Provided by EURASIP
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White Papers
Hardwired Networks on Chip in FPGAs to Unify Functional and Configuration Interconnects
Jan 2008
The authors propose that Networks on Chip (NOC) are hard-wired in Field-Programmable Gate Arrays (FPGA). Although some area of the FPGA then has a fixed function, this loss of flexibility is...
Provided by Delft University of Technology
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White Papers
Performance Analysis of Soft and Hard Single-Hop and Multi-Hop Circuit-Switched Interconnects for FPGAs
Jul 2008
This paper presents a performance analysis of hard and soft on-chip networks for FPGAs. The authors applied the Jackson's queuing model to analyze the performance of a MultiProcessor System on a...
Provided by Delft University of Technology
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White Papers
Modeling Reconfiguration in a FPGA With a Hardwired Network on Chip
Feb 2009
The authors propose that FPGAs use a HardWired Network On Chip (HWNOC) as a unified interconnect for functional communications (data and control) as well as configuration (bitstreams for soft IP)....
Provided by Delft University of Technology
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White Papers
Resource-Efficient Real-Time Scheduling Using Credit-Controlled Static-Priority Arbitration
Jun 2011
A present-day System-on-Chip (SoC) runs a wide range of applications with diverse real-time requirements. Resources, such as processors, interconnects and memories, are shared between these...
Provided by Eindhoven University of Technology (TU/e)
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White Papers
Hierarchical Segmentation for Hardware Function Evaluation
Dec 2008
This paper presents a method for evaluating functions based on piecewise polynomial approximations (splines) with a hierarchical segmentation scheme targeting hardware implementation. The...
Provided by Institute of Electrical and Electronics Engineers
-
White Papers
A Methodology and Tool Framework for Supporting Rapid Exploration of Memory Hierarchies in FPGAs
Dec 2010
This paper introduces a novel methodology for enabling rapid exploration of memory hierarchies onto FPGA devices. The methodology is software supported by a new open-source tool framework, named...
Provided by National Technical University of Athens
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White Papers
Quick Hotspot: A Software Supported Methodology for Supporting Run-Time Thermal Analysis at MPSoC Designs
Jan 2011
Detailed thermal analysis and exploration has recently received significant attention since it is straightforward-related to numerous reliability issues. Furthermore, thermal profiling is a...
Provided by National Technical University of Athens
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White Papers
Thermal Optimization for Micro-Architectures Through Selective Block Replication
May 2011
Increased power densities result to higher on-chip temperatures, which in turn creates numerous problems tightly firmed to reliability issues. This problem is expected to become even more severe...
Provided by National Technical University of Athens
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White Papers
Trading Fault-Masking With Performance Overhead for FPGAs
Jan 2011
Reliability issues become an important design concern with technology scaling. This paper introduces a novel methodology for balancing the desired fault masking and the consequence delay and power...
Provided by National Technical University of Athens
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White Papers
A Framework for Enabling Fault Tolerance in Reconfigurable Architectures
Dec 2009
Fault tolerance is a pre-request not only for safety critical systems, but almost for the majority of applications. However, the additional hardware elements impose performance degradation. In...
Provided by National Technical University of Athens
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White Papers
Towards Supporting Fault-Tolerance in FPGAs
Apr 2010
This paper proposes a novel methodology for improving reliability of FPGAs without requiring special purpose hardware. In contrast to related approaches that are applied uniformly over the target...
Provided by National Technical University of Athens
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White Papers
Fault-Free: A Framework for Supporting Fault Tolerance in FPGAs
Nov 2009
In this paper, the authors propose a novel methodology for supporting application mapping onto FPGAs with fault tolerance even if this feature is not supported by the target platform. For the...
Provided by National Technical University of Athens
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White Papers
Exploring Alternative 3D FPGA Architectures: Design Methodology and CAD Tool Support
Aug 2007
This paper introduces a software supported methodology for exploring/evaluating 3D FPGA architectures. Two new CAD tools are developed: the 3DPRO for placement and routing on 3D FPGAs and the...
Provided by Institute of Electrical and Electronics Engineers
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White Papers
A Software-Supported Methodology for Designing High-Performance 3D FPGA Architectures
Dec 2007
A software-supported systematic methodology for exploring and evaluating alternative 3D reconfigurable FPGA architectures is introduced. Two new software tools were developed: a placement and...
Provided by Institute of Electrical and Electronics Engineers
-
White Papers
Three Dimensional FPGA Architectures: A Shift Paradigm for Energy-Performance Efficient DSP Implementations
Jan 2012
Modern applications exhibit increased complexity which introduces extra constraints during implementation related to delay, power consumption and silicon area. This problem is even more important...
Provided by Institute of Electrical and Electronics Engineers
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White Papers
A Novel Methodology for Exploring Interconnection Architectures Targeting 3-D FPGAs
Dec 2008
In current reconfigurable architectures the interconnection structures increasingly contribute more to the delay and power consumption. The demand for increased clock frequencies and logic density...
Provided by National Technical University of Athens
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White Papers
System-Level Exploration of 3-D Interconnection Schemes
Nov 2008
3-D chip stacking is the big next step in system integration. Even though the process technology is maturing, many issues related to system implementation are not fully understood yet....
Provided by National Technical University of Athens
-
White Papers
A Software-Supported Methodology for Exploring Interconnection Architectures Targeting 3-D FPGAs
Jan 2009
Interconnect structures significantly contribute to the delay, power consumption, and silicon area of modern reconfigurable architectures. The demand for higher clock frequencies and logic...
Provided by National Technical University of Athens
-
White Papers
A Novel Methodology for Architecture-Level Exploration of 3D SoCs
May 2011
Three-Dimensional (3D) integration is an emerging technology that is expected to lead to tremendous benefits in terms of power, delay and silicon area. Moreover, 3D technology continues...
Provided by National Technical University of Athens
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White Papers
CAD Tools for Designing 3D Integrated Systems
Jun 2011
Expectations of consumer for future consumer electronics devices put significant strain on conventional design and manufacturing processes. Integrating more functionality in a smaller form factor...
Provided by Institute of Electrical and Electronics Engineers
-
White Papers
A Software-Supported Methodology for Designing General-Purpose Interconnection Networks for Reconfigurable Architectures
Jan 2012
Modern applications realized onto FPGAs exhibit high connectivity demands. Throughout this paper, the authors study the routing constraints of Virtex devices and they propose a systematic...
Provided by Democritus University of Thrace
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White Papers
Enhanced Core Processor Blocks of OFDM System
Sep 2011
OFDM is a multi carrier modulation technique in which the carriers are Orthogonal to each others as a result of which it provides high bandwidth efficiency and multiple carriers share the data...
Provided by International Journal of Electronics Communication and Computer Engineering
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White Papers
Switched Modular Redundancy for TID Mitigation in Digital Circuits
Aug 2006
The authors present a novel design technique for hardening digital electronic circuits against Total Ionizing Dose (TID). There is increasing use of commercial components in space technology and...
Provided by University of Stellenbosch
-
White Papers
OFDM Receiver Design
Dec 2000
Othogonal Frequency Division Multiplex (OFDM) has gained considerable attention in recent years. It has been adopted for various standards include the 802.11a wireless LAN standard. In this...
Provided by Regents of the University of California
-
White Papers
Windows 7 - Mobile Broadband Certification for Existing Chipsets
Mar 2009
This paper provides information about Windows 7 support for Mobile Broadband. It provides guidelines for hardware manufacturers, original equipment manufacturers, and mobile network operators on...
Provided by Microsoft
-
White Papers
Power Improvements on 2008 Desktop Platforms
Oct 2008
This paper presents platform- and silicon component power data that demonstrate advances in desktop platform power management enabled on 2008 platforms, built with the Intel Q45 Express Chipset,...
Provided by Intel
-
White Papers
Consolidating DSS Workloads on Dell PowerEdge 11G Servers Using Oracle 11g Database Replay
Apr 2009
Any server consolidation project must be preceded by a well-planned effort to predict the energy consumption and performance capacity of the new platform as compared to the legacy environment....
Provided by Dell
-
White Papers
Performance Report PRIMERGY RX300 S4
Dec 2007
The PRIMERGY RX300 S4 is a space-saving dual socket rack server which takes up just 2 height units and replaces the PRIMERGY RX300 S3. It has an Intel 5000P chipset, two Intel Dual-Core or...
Provided by Fujitsu Siemens
-
White Papers
Windows ACPI Emulated Devices Table
Apr 2009
Modern PC platforms often use devices that have known errata. In this case, the Windows family of operating systems may include mechanisms to work around these known errata whenever possible. Two...
Provided by Microsoft
-
White Papers
Performance Advantage of Dell PowerEdge R900 over HP DL585 Running Microsoft Hyper-V
Sep 2008
Information Technology organizations are finding that combining today's industry standard servers based on multi-core processors with server virtualization can create highly efficient solutions. A...
Provided by Dell
-
White Papers
Three Easy Ways To Achieve and Understand WAN Acceleration with TCP Applications
Feb 2010
A major problem with file transmission between two or more points results from latency, which comes from various sources, including the hardware (switches, routers) and the media that you are...
Provided by Global Knowledge
-
Tools & Templates
Intel® Atom™ Developer Program's Million Dollar Developer Fund
Mar 2010
Netbooks' mobility and smaller screen sizes demand applications that are optimized for a mobile, on-the-go audience. The Intel Atom Developer Program Million Dollar Development Fund helps...
Provided by Intel
-
White Papers
Optimizing Power Distribution for High-Density Computing
Apr 2010
Choosing the right power distribution units for today and preparing for the future Fueled by the rapid rise of technologies such as virtualization and blade servers, computing densities in...
Provided by Eaton
-
White Papers
New Intel® Atom™ Dev SDK brings enhancements & component integration
Jun 2010
The Intel® Atom™ Developer Program has just released Beta 3 of its Windows SDK. With this new release, there are a number of enhancements to assist with application development, and it offers a...
Provided by Intel
-
White Papers
SCOC3: A Space Computer on a Chip - An Example of Successful Development of a Highly Integrated Innovative ASIC
Feb 2010
This paper presents the definition of an integrated processor core ASIC named SCOC3 which is designed for space computers. It also presents the validation method that has led to a successful ASIC...
Provided by Economic Development Association of Alabama
-
White Papers
Achieving One TeraFLOPS With 28-nm FPGAs
Sep 2010
Due to recent technological developments, high-performance floating-point signal processing can, for the first time, be easily achieved using FPGAs. To date, virtually all FPGA-based signal...
Provided by Altera
-
White Papers
Fulfilling Technology Needs for 40G-100G Network-Centric Operations and Warfare
Sep 2010
The development and deployment of Network-Centric Operations and Warfare (NCOW) to integrate and connect the military's many separate networks relies on high-speed packet transport and optical...
Provided by Altera
-
White Papers
Board Design Guidelines for LVDS Systems
Sep 2010
LVDS is a high-speed, low-voltage, low-power, and low-noise general-purpose I/O interface standard. The low-voltage swing and differential current mode outputs significantly reduce Electromagnetic...
Provided by Altera
-
White Papers
Implementing FIR Filters and FFTs With 28-nm Variable-Precision DSP Architecture
Sep 2010
Across a range of applications, the two most common functions implemented in FPGA-based high-performance signal processing are Finite Impulse Response (FIR) filters and fast Fourier transforms...
Provided by Altera
-
White Papers
Guaranteeing Silicon Performance With FPGA Timing Models
Aug 2010
How can a designer accurately predict the time delays of a fully customizable integrated circuit? The answer to this question is "Not very easily." There are many factors that limit and increase...
Provided by Altera
-
White Papers
Enhancing Robust SEU Mitigation With 28-nm FPGAs
Jul 2010
Systems designed with FPGAs benefit from significant improvements over ASICS, such as rapid-process technology scaling and design innovation, which permit the use of FPGAs in high-availability,...
Provided by Altera
-
White Papers
Medical Imaging Implementation Using FPGAs
Jul 2010
Earlier prediction and treatment are driving the fusion of modalities such as Positron Emission Tomography (PET)/Computerized Tomography (CT) and X-ray/CT equipment. The higher image resolutions...
Provided by Altera
-
White Papers
Addressing 100-GbE Line-Card Design Challenges on 28-nm FPGAs
Jul 2010
As various standard bodies finalize their 100G standards for transport, Ethernet, and optical interfaces, FPGAs play a vital role for early adopters of technology who want to design 100G...
Provided by Altera
-
White Papers
Increasing Design Functionality With Partial and Dynamic Reconfiguration in 28-nm FPGAs
Jul 2010
The density of FPGAs has grown with each process node shrink. Compared to previous generations of FPGAs, the extra density, coupled with features such as reconfiguration, enables designers to add...
Provided by Altera
-
White Papers
Innovating With a Full Spectrum of 40-nm FPGAs and ASICs With Transceivers
Jul 2010
Increasing bandwidth requirements for broadband services are driving silicon vendors to use more and more high-speed serial transceivers. Therefore, next-generation applications feature a wide...
Provided by Altera
-
White Papers
Integrating 100-GbE Switching Solutions on 28-nm FPGAs
Jul 2010
With high-speed 100-GbE communication network standards converging, switching functions play a key role in the smooth functioning of the Internet. The aggregated network traffic doubles every six...
Provided by Altera
-
White Papers
Understanding 40-nm FPGA Solutions for SATA/SAS
Jul 2010
Serial ATA (SATA) and Serial Attached SCSI (SAS) are computer bus standards that have the primary function of transferring data (directly or otherwise) between the motherboard and mass storage...
Provided by Altera
-
White Papers
Accelerating DSP Designs With the Total 28-nm DSP Portfolio
Jul 2010
Implementing Digital Signal Processing (DSP) datapaths with different performance, precision, Intellectual Property (IP), and development flows is challenging and labor-intensive. As more and more...
Provided by Altera
-
White Papers
Building an IP Surveillance Camera System With a Low-Cost FPGA
Jun 2010
In the video surveillance marketplace, the need for higher quality video, higher resolution, and more flexibility and features is driving the change from analog to digital cameras. By definition,...
Provided by Altera
-
White Papers
Boosting System Performance With External Memory Solutions
Jun 2010
Over 70% of designs on Altera FPGAs require some type of external memory in the design, but the needs vary depending on the individual application. This white paper addresses all aspects of...
Provided by Altera
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White Papers
Enabling Low-Power EO/IR System Development With FPGAs and Image- and Sensor-Processing IP
Jun 2010
Before embarking on the development of a next-generation Electro-Optical and Infrared (EO/IR) system, it is important to not only understand the power and performance characteristics of the FPGA,...
Provided by Altera
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White Papers
Enabling High-Precision DSP Applications With the FPGA Industry's First Variable-Precision Architecture
May 2010
The silicon Digital Signal Processing (DSP) architecture of the FPGA can make a big difference when implementing complex signal-processing algorithms. Altera's Stratix V FPGAs, with the...
Provided by Altera
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White Papers
Extending Transceiver Leadership at 28 nm
May 2010
High-speed serial protocols with increased data rates and expanded capabilities are addressing the demand for more network bandwidth. Efficiently supporting the subsequent increase in system...
Provided by Altera
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White Papers
Enabling Improved Image Format Conversion With FPGAs
Apr 2010
Broadcast infrastructure systems - such as servers, switchers, head-end encoders, and specialty studio displays - support a multitude of input image formats, and commonly require images to be...
Provided by Altera
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White Papers
Driving Flexibility Into Automotive Electronics Design
Mar 2010
With the dramatic increase in development costs for state-of-the-art process technologies, such as next-generation automotive electronic systems, specialization of traditional microcontrollers no...
Provided by Altera
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White Papers
Developing Functional Safety Systems With TÜV-Qualified FPGAs
Mar 2010
This white paper discusses how market trends, the need for increased productivity, and new legislation have accelerated the use of safety systems in industrial machinery. This TÜV-qualified FPGA...
Provided by Altera
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White Papers
Using 10-Gbps Transceivers in 40G/100G Applications
Feb 2010
This white paper identifies the key drivers behind the migration to 100G interfaces, and shows how to leverage the unique ability of FPGAs to implement this high-speed interface. The emerging...
Provided by Altera
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White Papers
Supporting Digital Television Trends With Next-Generation FPGAs
Feb 2010
The proliferation of so many different digital television models-better known as market fragmentation- and differing regional market requirements, combined with the desire to add new features and...
Provided by Altera
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White Papers
Decrease Total System Costs with Industry's Lowest Cost, Lowest Power FPGAs
Nov 2009
Corporate objectives, such as increasing profits and sales revenue while utilizing R&D efficiently, are putting severe pressure on today's design engineering teams. The resulting system level...
Provided by Altera
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White Papers
Taking Advantage of Advances in FPGA Floating-Point IP Cores
Oct 2009
Recently available FPGA design tools and IP provide a substantial reduction in computational resources, as well as greatly easing the implementation effort in a floating-point datapath. Moreover,...
Provided by Altera
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White Papers
High-Definition Video Deinterlacing Using FPGAs
Oct 2009
Deinterlacing was developed to address a legacy problem: the interlaced video that was required by old analog televisions must be converted to be shown on today's digital televisions. An...
Provided by Altera
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White Papers
Leveraging Cost-Optimized FPGAs to Deliver OTN Mapper Solutions
Oct 2009
In telecommunications transport infrastructure, Optical Transport Network (OTN) and Gigabit Ethernet (GbE) protocols are being combined to create Packet-Optical Transport Networks (P-OTNs)....
Provided by Altera
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White Papers
Using LEDs as Light-Level Sensors and Emitters
Oct 2009
Modulating LED power based on ambient light level increases battery life, a particularly helpful feature in a device where battery life is measured in days. Using a very simple circuit, Altera's...
Provided by Altera
