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memory components
(71 results)-
White Papers
SQL Server 2000 Enterprise Edition (64-bit): Advantages of a 64-Bit Environment
Nov 2004
HP has partnered with Microsoft to provide information about the advantages of a 64-Bit Environment. Microsoft SQL Server 2000 Enterprise Edition (64-bit) offers dramatic improvements in memory...
Provided by Hewlett-Packard (HP)
-
White Papers
Prevent critical coding defects early
Nov 2010
Intel® Inspector XE 2011 is a powerful and easy-to-use memory and threading error checking tool for C, C++, C# .NET, and Fortran developers designing serial and parallel applications on Windows*-...
Provided by Intel Corporation
-
White Papers
IBM Cloud tip: A basic understanding of ephemeral storage
Apr 2011
Ephemeral disk storage, also known as local disk devices is an important component in using the IBM® SmartCloud. This article details the layout of the virtual disk drives available to the...
Provided by IBM
-
White Papers
Advances in Memory Management for Windows
Oct 2007
This paper provides information about enhancements in memory management for Windows Vista and Windows Server 2008. It describes the changes that Microsoft has implemented internally in the...
Provided by Microsoft
-
White Papers
Memory Sizing Guidance for Windows 7
Jul 2009
This paper describes an approach that Information Technology (IT) professionals and system builders can use to determine how much memory is required to successfully run a set of programs. It...
Provided by Microsoft
-
White Papers
Firmware Corruption of Memory During Sleep Transitions
Jun 2009
This paper provides information for system manufacturers and firmware developers about firmware corruption of memory during sleep transitions. During Windows 7 development, multiple Windows-based...
Provided by Microsoft
-
White Papers
Containing the Cost of Enterprise Databases while Boosting their Flexibility and Availability: Sybase ASE Cluster Edition
Sep 2009
It is time for enterprises to radically rethink the way they deploy databases and look for technology that will help them find an affordable path to high availability, scalability, flexibility in...
Provided by Sybase
-
White Papers
ONE Oracle News for Midsize Organizations - Issue 04
Sep 2009
Midsize companies have their size and agility on their side. To make the most of your agility advantage against larger competitors, streamlining your processes is one of the best steps you can...
Provided by Oracle
-
Webcasts
Fundamentals of Volume Activation
Nov 2009
Volume Activation is a set of activation methods applicable to systems under the Volume Licensing program or using Volume Licensing media obtained thru MSPP/MAPS/MSDN. Activation is required and...
Provided by Microsoft
-
Webcasts
Paving the Road to a PC Refresh
Aug 2005
If you've got aging computers with low memory and lagging speed, your end users' productivity is undoubtedly hampered. Of course, enterprise PC refreshes require significant investments beyond an...
Provided by Insight Direct
-
White Papers
Understanding Shared Pool Memory Structures: Tips on How to Optimize Usage and Avoid Errors
Sep 2005
The Oracle shared pool provides critical services for sharing of complex objects among large numbers of users. Prior to 10g R1, DBAs often spent much time learning about the shared pool memory...
Provided by Oracle
-
White Papers
Business Navigation Systems Combine CEP with BPM
Sep 2010
Enterprises invest in packaged applications, development systems, testing, services oriented architectures, middleware and analytics to align process automation with business cycles. When IT is...
Provided by Progress Software
-
White Papers
Boosting System Performance With External Memory Solutions
Jun 2010
Over 70% of designs on Altera FPGAs require some type of external memory in the design, but the needs vary depending on the individual application. This white paper addresses all aspects of...
Provided by Altera
-
White Papers
Low-Cost Integration of Serial EEPROMs and Flash Memory Devices
Mar 2008
In many applications, non-volatile memory needs are addressed by general-purpose serial-interface Electrically Erasable Programmable Read-Only Memories (EEPROMs) or flash memory devices,...
Provided by Altera
-
White Papers
Operating System Support for NVM+DRAM Hybrid Main Memory
Nov 2009
For several decades, general-purpose CPUs have used DRAM for main memory. DRAM has many good features, and has benefited from Moore's Law, but DRAM is not perfect: it is relatively expensive in...
Provided by Hewlett-Packard (HP)
-
White Papers
A Performance Comparison of AMD Opteron™ Processors with Microsoft® Hyper-V™Server 2008 R2
Nov 2010
Virtualization is becoming almost a necessity due in part to economic reasons but also in order to take full advantage of the sheer processing power offered by today's technology. This eventually...
Provided by Dell
-
White Papers
uFLIP: Understanding Flash IO Patterns
Jan 2009
Does the advent of flash devices constitute a radical change for secondary storage? How should database systems adapt to this new form of secondary storage? Before the authors can answer these...
Provided by University of Copenhagen
-
White Papers
Framework for Improving Parallelism by Write-Update Coherence Protocol in Distributed Shared Memory System
May 2008
For increasing parallelism in DSM System, the replication of data is to be done. The replication of data increases parallelism by allowing reads of the same data to be executed in parallel....
Provided by Academy Publisher
-
White Papers
Recursive Statistical Blockade: An Enhanced Technique for Rare Event Simulation With Application to SRAM Circuit Design
Jul 2007
Circuit reliability under statistical process variation is an area of growing concern. For highly replicated circuits such as SRAMs and flip flops, a rare statistical event for one circuit may...
Provided by Carnegie Mellon University
-
White Papers
Suitability of Requirements Abstraction Model (RAM) Requirements for High-Level System Testing
Jun 2009
The Requirements Abstraction Model (RAM) helps in managing abstraction in requirements by organizing them at four levels (product, feature, function and component). The RAM is adaptable and can be...
Provided by Katholieke Universiteit Leuven
-
White Papers
A Low Power SRAM Base on Novel Word-Line Decoding
Jun 2009
This paper proposes a low power SRAM based on five transistor SRAM cell. Proposed SRAM uses novel word-line decoding such that, during read/write operation, only selected cell connected to...
Provided by Islamic Azad University
-
White Papers
Memory Safety for Low-Level Software/Hardware Interactions
Jun 2009
Systems that enforce memory safety for today's operating system kernels and other system software do not account for the behavior of low-level software/hardware interactions such as memory-mapped...
Provided by University of Illinois
-
White Papers
A Scalable Memory Model for Low-Level Code
Oct 2008
Because of critical importance underlying all other software, low level system software is among the most important targets for formal verification. Low-level systems software must sometimes make...
Provided by University of British Columbia
-
White Papers
Memory Subsystem Simulation in Software TLM/T Models
Feb 2009
Design of Multiprocessor System-on-a-Chips requires efficient and accurate simulation of every component. Since the memory subsystem accounts for up to 50%of the performance and energy...
Provided by University of California
-
White Papers
Collecting Sensitive Information From Windows Physical Memory
Jan 2009
When investigators are faced with a target system, they want to find sensitive information such as userID and password. Unfortunately, sensitive information can not be found on the hard drive in...
Provided by Academy Publisher
-
White Papers
Time-Frequency Characterization of Long-Term Memory in Nonlinear Power Amplifiers
May 2008
This paper presents a new time-frequency characterization method for extracting the linear and third-order nonlinear parameters of a PA including long term memory. A dynamic frequency two-tone...
Provided by Institute of Electrical and Electronics Engineers
-
White Papers
Design and Implementation of 8K-Bits Low Power SRAM in 180nm Technology
Mar 2009
This paper explores the tradeoffs that are involved in the design of SRAM. The major components of an SRAM such as the row decoders, the memory cells and the sense amplifiers have been studied in...
Provided by SV College of Engineering & Technology
-
White Papers
Flashpower: A Detailed Power Model for Nand Flash Memory
Dec 2009
Flash memory is widely used in consumer electronics products, such as cell-phones and music players, and is increasingly displacing hard disk drives as the primary storage device in laptops,...
Provided by University of Virginia
-
White Papers
Attested Append-Only Memory: Making Adversaries Stick to Their Word
Oct 2007
Researchers have made great strides in improving the fault tolerance of both centralized and replicated systems against arbitrary (Byzantine) faults. However, there are hard limits to how much can...
Provided by Association for Computing Machinery
-
White Papers
Energy-Efficient Cluster Computing With FAWN: Workloads and Implications
Mar 2010
This paper presents the architecture and motivation for a cluster-based, many-core computing architecture for energy-efficient, data-intensive computing. FAWN, a Fast Array of Wimpy Nodes,...
Provided by Carnegie Mellon University
-
White Papers
FAWN: A Fast Array of Wimpy Nodes
Oct 2009
This paper presents a new cluster architecture for low-power data-intensive computing. FAWN couples low-power embedded CPUs to small amounts of local flash storage, and balances computation and...
Provided by Association for Computing Machinery
-
White Papers
FAWNdamentally Power-Efficient Clusters
May 2009
Power is becoming an increasingly large financial and scaling burden for computing and society. The costs of running large data centers are becoming dominated by power and cooling to the degree...
Provided by Carnegie Mellon University
-
White Papers
SSDAlloc: Hybrid SSD/RAM Memory Management Made Easy
Mar 2011
The authors introduce SSDAlloc, a hybrid main memory management system that allows developers to treat Solid-State Disk (SSD) as an extension of the RAM in a system. SSDAlloc moves the SSD upward...
Provided by Princeton University
-
White Papers
Phase Change Technology and the Future of Main Memory
Mar 2010
Over the past few decades, memory technology scaling has provided many benefits, including increased density and capacity and reduced cost. Scaling has provided these benefits for conventional...
Provided by Institute of Electrical and Electronics Engineers
-
White Papers
Guiding Architectural SRAM Models
Jan 2011
Caches, block memories, predictors, state tables, and other forms of on-chip memory are continuing to consume a greater portion of processor designs with each passing year. Making good...
Provided by University of California
-
White Papers
Virtually Pipelined Network Memory
Sep 2006
The authors introduce virtually-pipelined memory, an architectural technique that efficiently supports high-bandwidth, uniform latency memory accesses, and high-confidence throughput even under...
Provided by University of California
-
White Papers
3D Integration for Introspection
May 2007
Developing high-quality software for a modern computer system is no easy task. Performance-critical applications are likely to execute for quadrillions of instructions and operate in a complex...
Provided by Institute of Electrical and Electronics Engineers
-
White Papers
Load Miss Prediction - Exploiting Power Performance Trade-Offs
Jan 2007
Modern CPUs operate at GHz frequencies, but the latencies of memory accesses are still relatively large, in the order of hundreds of cycles. Deeper cache hierarchies with larger cache sizes can...
Provided by Institute of Electrical and Electronics Engineers
-
White Papers
Abstract Storage Devices
Jun 2007
A quantum storage device differs radically from a conventional physical storage device. Its state can be set to any value in a certain (infinite) state space, but in general every possible read...
Provided by University of Cambridge
-
White Papers
Logic, Design & Organization of PTVD-SHAM; a Parallel Time Varying & Data Super-Helical Access Memory
Oct 2007
This paper encompasses a super helical memory system's design, 'Boolean logic & image-logic' as a theoretical concept of an invention-model to 'Store time-data' in terms of anticipating the best...
Provided by University of Hull
-
White Papers
Handheld System Energy Reduction by OS-Driven Refresh
Dec 2009
Emerging portable devices relay on DRAM/flash memory system to satisfy requirements on fast and large data storage and low-energy consumption. This paper presents a novel approach to reduce energy...
Provided by Springer Science+Business Media
-
White Papers
Reducing Energy of DRAM/Flash Memory System by OS-Controlled Data Refresh
Jun 2007
This paper presents a new approach to reduce energy consumption of DRAM/flash memory system by lowering the frequency of DRAM refreshes. The approach is based on two ideas: a DRAM based swap-cache...
Provided by Institute of Electrical and Electronics Engineers
-
White Papers
Dynamically Reconfigurable Hybrid Cache: An Energy-Efficient Last-Level Cache Design
Dec 2011
The recent development of Non-Volatile Memory (NVM), such as Spin-Torque Transfer magnetoresistive RAM (STT-RAM) and Phase-change RAM (PRAM), with the advantage of low leakage and high density,...
Provided by Economic Development Association of Alabama
-
White Papers
Multijunction Fault-Tolerance Architecture for Nanoscale Crossbar Memories
Mar 2008
Nanoscale elements are fabricated using bottom-up processes, and as such are prone to high levels of defects. Therefore, fault-tolerance is crucial for the realization of practical nanoscale...
Provided by Institute of Electrical and Electronics Engineers
-
White Papers
Reliable Architecture for Flash Memory
Jul 2009
The mounting demand for high density non-volatile flash memories consequences new challenges of flash memory reliability issues [1, 2]. Common reliability-improving techniques approaches are...
Provided by Technion - Israel Institute of Technology
-
White Papers
Profile-Based Pretenuring
Jan 2007
Garbage Collection (GC) is a technique for storage management that automatically reclaims unreachable program data. In addition to sparing the programmer the effort of explicit storage management,...
Provided by Association for Computing Machinery
-
White Papers
Generic Database Cost Models for Hierarchical Memory Systems
Jan 2011
Accurate prediction of operator execution time is a prerequisite for database query optimization. Although extensively studied for conventional disk-based DBMSs, cost modeling in main-memory DBMSs...
Provided by CWI
-
White Papers
The Importance of Including Dependencies in Trace Based Performance Analysis of On-Chip Networks
Dec 2009
With the advent of large scale chip-level multiprocesssors, there is renewed interest in the design and analysis of on-chip networks. The use of full system simulation is the most accurate way to...
Provided by UC Regents
-
White Papers
A Development of Disk Drive With Flash Memory for ATA-6
Sep 2007
In this paper, the authors have designed and constructed a flash memory drive using the ATA-6 bus method for flash memories, which is an element of semiconductors, in order to improve the problems...
Provided by Cheongju University
-
White Papers
An Efficient Hardware Implementation of Extended and Fast Physical Addressing in Microprocessor-Based Systems Using Programmable Logic
Jun 2009
This paper describes an efficient hardware implementation of a new technique for interfacing the data exchange between the microprocessor-based systems and the external devices. This technique,...
Provided by University SAAD Dahlab Blida
-
White Papers
Integrating Dynamic Power Management in Systems With Multiple DVS Components
Jan 2011
Recent embedded computing platforms offer multiple independent clocks for different components involved in processing a single instruction stream, such as CPU and memory, giving rise to a new...
Provided by University of Illinois
-
White Papers
Retaining Sandbox Containment Despite Bugs in Privileged Memory-Safe Code
Oct 2010
Flaws in the standard libraries of secure sandboxes represent a major security threat to billions of devices worldwide. The standard libraries are hard to secure because they frequently need to...
Provided by Association for Computing Machinery
-
White Papers
Analyzing the Impact of Useless Write-Backs on the Endurance and Energy Consumption of PCM Main Memory
Feb 2011
Phase Change Memory (PCM) is an emerging technology that has been recently considered as a cost-effective and energy-efficient alternative to traditional DRAM main memory. Due to the high energy...
Provided by University of Pittsburgh
-
White Papers
Scalable Directoryless Shared Memory Coherence Using Execution Migration
Nov 2010
The authors introduce the concept of deadlock-free migration-based coherent shared memory to the NUCA family of architectures. Migration-based architectures move threads among cores to guarantee...
Provided by Massachusetts Institute of Technology
-
White Papers
The Design and Implementation of MCFlow: A Real-Time Multi-Core Aware Middleware for Dependent Task Graphs
Oct 2010
Modern computer architectures have evolved from uniprocessor platforms to multi-processor and multi-core platforms, but traditional real-time distributed middleware such as RT-CORBA has not kept...
Provided by Washington University in St. Louis
-
White Papers
Corey: An Operating System for Many Cores
Apr 2009
Multiprocessor application performance can be limited by the operating system when the application uses the operating system frequently and the operating system services use data structures shared...
Provided by Fudan University
-
White Papers
Optimizing MapReduce for Multicore Architectures
Jun 2010
MapReduce is a programming model for data-parallel programs originally intended for data centers. MapReduce simplifies parallel programming, hiding synchronization and task management. These...
Provided by Massachusetts Institute of Technology
-
White Papers
PDRAM: A Hybrid PRAM and DRAM Main Memory System
Jul 2009
In this paper, the authors propose PDRAM, a novel energy efficient main memory architecture based on Phase change Random Access Memory (PRAM) and DRAM. The paper explores the challenges involved...
Provided by Association for Computing Machinery
-
White Papers
RAMS and BlackSheep: Inferring White-Box Application Behavior Using Black-Box Techniques
May 2008
A significant challenge in developing automated problem-diagnosis tools for distributed systems is the ability of these tools to differentiate between changes in system behavior due to workload...
Provided by Carnegie Mellon University
-
White Papers
Cache Equalizer: A Placement Mechanism for Chip Multiprocessor Distributed Shared Caches
Aug 2011
This paper describes Cache Equalizer (CE), a novel distributed cache management scheme for large-scale Chip MultiProcessors (CMPs). The work is motivated by large asymmetry in cache sets' usages....
Provided by Association for Computing Machinery
-
White Papers
Advanced Hashing Schemes for Packet Forwarding Using Set Associative Memory Architectures
Oct 2010
Building a high performance IP Packet Forwarding (PF) engine remains a challenge due to increasingly stringent throughput requirements and the growing size of IP forwarding tables. The router has...
Provided by Reed Elsevier
-
White Papers
Memory Management Technique for Paging on Distributed Shared Memory Framework
Apr 2010
Distributed Shared Memory (DSM) System has become popular paradigm in distributed system. As DSM system involves moving of data from on node to another node which is in typical network, so...
Provided by Integral University
-
White Papers
Building Flexible, Fault-Tolerant Flash-Based Storage Systems
Sep 2009
Adding flash memory to the storage hierarchy has recently gained a great deal of attention in both industry and academia. Decreasing cost, low power utilization and improved performance has...
Provided by Santa Clara University
-
White Papers
Logic, Design & Organization of PTVD-SHAM; a Parallel Time Varying & Data Super-Helical Access Memory
Oct 2007
This paper encompasses a super helical memory system's design, 'Boolean logic & image-logic' as a theoretical concept of an invention-model to 'Store time-data' in terms of anticipating the best...
Provided by University of Hull
-
White Papers
Abstract Storage Devices
Jun 2007
A quantum storage device differs radically from a conventional physical storage device. Its state can be set to any value in a certain (infinite) state space, but in general every possible read...
Provided by University of Cambridge
-
White Papers
Load Miss Prediction - Exploiting Power Performance Trade-Offs
Jan 2007
Modern CPUs operate at GHz frequencies, but the latencies of memory accesses are still relatively large, in the order of hundreds of cycles. Deeper cache hierarchies with larger cache sizes can...
Provided by Institute of Electrical and Electronics Engineers
-
White Papers
IBM Cloud tip: A basic understanding of ephemeral storage
Apr 2011
Ephemeral disk storage, also known as local disk devices is an important component in using the IBM® SmartCloud. This article details the layout of the virtual disk drives available to the...
Provided by IBM
-
White Papers
3D Integration for Introspection
May 2007
Developing high-quality software for a modern computer system is no easy task. Performance-critical applications are likely to execute for quadrillions of instructions and operate in a complex...
Provided by Institute of Electrical and Electronics Engineers
-
White Papers
Virtually Pipelined Network Memory
Sep 2006
The authors introduce virtually-pipelined memory, an architectural technique that efficiently supports high-bandwidth, uniform latency memory accesses, and high-confidence throughput even under...
Provided by University of California
-
White Papers
Guiding Architectural SRAM Models
Jan 2011
Caches, block memories, predictors, state tables, and other forms of on-chip memory are continuing to consume a greater portion of processor designs with each passing year. Making good...
Provided by University of California
-
White Papers
Phase Change Technology and the Future of Main Memory
Mar 2010
Over the past few decades, memory technology scaling has provided many benefits, including increased density and capacity and reduced cost. Scaling has provided these benefits for conventional...
Provided by Institute of Electrical and Electronics Engineers
-
White Papers
SSDAlloc: Hybrid SSD/RAM Memory Management Made Easy
Mar 2011
The authors introduce SSDAlloc, a hybrid main memory management system that allows developers to treat Solid-State Disk (SSD) as an extension of the RAM in a system. SSDAlloc moves the SSD upward...
Provided by Princeton University
-
White Papers
FAWNdamentally Power-Efficient Clusters
May 2009
Power is becoming an increasingly large financial and scaling burden for computing and society. The costs of running large data centers are becoming dominated by power and cooling to the degree...
Provided by Carnegie Mellon University
-
White Papers
FAWN: A Fast Array of Wimpy Nodes
Oct 2009
This paper presents a new cluster architecture for low-power data-intensive computing. FAWN couples low-power embedded CPUs to small amounts of local flash storage, and balances computation and...
Provided by Association for Computing Machinery
-
White Papers
Energy-Efficient Cluster Computing With FAWN: Workloads and Implications
Mar 2010
This paper presents the architecture and motivation for a cluster-based, many-core computing architecture for energy-efficient, data-intensive computing. FAWN, a Fast Array of Wimpy Nodes,...
Provided by Carnegie Mellon University
-
White Papers
Attested Append-Only Memory: Making Adversaries Stick to Their Word
Oct 2007
Researchers have made great strides in improving the fault tolerance of both centralized and replicated systems against arbitrary (Byzantine) faults. However, there are hard limits to how much can...
Provided by Association for Computing Machinery
-
White Papers
Flashpower: A Detailed Power Model for Nand Flash Memory
Dec 2009
Flash memory is widely used in consumer electronics products, such as cell-phones and music players, and is increasingly displacing hard disk drives as the primary storage device in laptops,...
Provided by University of Virginia
-
White Papers
Design and Implementation of 8K-Bits Low Power SRAM in 180nm Technology
Mar 2009
This paper explores the tradeoffs that are involved in the design of SRAM. The major components of an SRAM such as the row decoders, the memory cells and the sense amplifiers have been studied in...
Provided by SV College of Engineering & Technology
-
White Papers
Time-Frequency Characterization of Long-Term Memory in Nonlinear Power Amplifiers
May 2008
This paper presents a new time-frequency characterization method for extracting the linear and third-order nonlinear parameters of a PA including long term memory. A dynamic frequency two-tone...
Provided by Institute of Electrical and Electronics Engineers
-
White Papers
Collecting Sensitive Information From Windows Physical Memory
Jan 2009
When investigators are faced with a target system, they want to find sensitive information such as userID and password. Unfortunately, sensitive information can not be found on the hard drive in...
Provided by Academy Publisher
-
White Papers
SQL Server 2000 Enterprise Edition (64-bit): Advantages of a 64-Bit Environment
Nov 2004
HP has partnered with Microsoft to provide information about the advantages of a 64-Bit Environment. Microsoft SQL Server 2000 Enterprise Edition (64-bit) offers dramatic improvements in memory...
Provided by Hewlett-Packard (HP)
-
White Papers
Memory Sizing Guidance for Windows 7
Jul 2009
This paper describes an approach that Information Technology (IT) professionals and system builders can use to determine how much memory is required to successfully run a set of programs. It...
Provided by Microsoft
-
White Papers
Firmware Corruption of Memory During Sleep Transitions
Jun 2009
This paper provides information for system manufacturers and firmware developers about firmware corruption of memory during sleep transitions. During Windows 7 development, multiple Windows-based...
Provided by Microsoft
-
White Papers
Advances in Memory Management for Windows
Oct 2007
This paper provides information about enhancements in memory management for Windows Vista and Windows Server 2008. It describes the changes that Microsoft has implemented internally in the...
Provided by Microsoft
-
White Papers
Containing the Cost of Enterprise Databases while Boosting their Flexibility and Availability: Sybase ASE Cluster Edition
Sep 2009
It is time for enterprises to radically rethink the way they deploy databases and look for technology that will help them find an affordable path to high availability, scalability, flexibility in...
Provided by Sybase
-
White Papers
ONE Oracle News for Midsize Organizations - Issue 04
Sep 2009
Midsize companies have their size and agility on their side. To make the most of your agility advantage against larger competitors, streamlining your processes is one of the best steps you can...
Provided by Oracle
-
Webcasts
Fundamentals of Volume Activation
Nov 2009
Volume Activation is a set of activation methods applicable to systems under the Volume Licensing program or using Volume Licensing media obtained thru MSPP/MAPS/MSDN. Activation is required and...
Provided by Microsoft
-
Webcasts
Paving the Road to a PC Refresh
Aug 2005
If you've got aging computers with low memory and lagging speed, your end users' productivity is undoubtedly hampered. Of course, enterprise PC refreshes require significant investments beyond an...
Provided by Insight Direct
-
White Papers
Understanding Shared Pool Memory Structures: Tips on How to Optimize Usage and Avoid Errors
Sep 2005
The Oracle shared pool provides critical services for sharing of complex objects among large numbers of users. Prior to 10g R1, DBAs often spent much time learning about the shared pool memory...
Provided by Oracle
-
White Papers
Business Navigation Systems Combine CEP with BPM
Sep 2010
Enterprises invest in packaged applications, development systems, testing, services oriented architectures, middleware and analytics to align process automation with business cycles. When IT is...
Provided by Progress Software
-
White Papers
Boosting System Performance With External Memory Solutions
Jun 2010
Over 70% of designs on Altera FPGAs require some type of external memory in the design, but the needs vary depending on the individual application. This white paper addresses all aspects of...
Provided by Altera
-
White Papers
Low-Cost Integration of Serial EEPROMs and Flash Memory Devices
Mar 2008
In many applications, non-volatile memory needs are addressed by general-purpose serial-interface Electrically Erasable Programmable Read-Only Memories (EEPROMs) or flash memory devices,...
Provided by Altera
-
White Papers
Operating System Support for NVM+DRAM Hybrid Main Memory
Nov 2009
For several decades, general-purpose CPUs have used DRAM for main memory. DRAM has many good features, and has benefited from Moore's Law, but DRAM is not perfect: it is relatively expensive in...
Provided by Hewlett-Packard (HP)
-
White Papers
A Performance Comparison of AMD Opteron™ Processors with Microsoft® Hyper-V™Server 2008 R2
Nov 2010
Virtualization is becoming almost a necessity due in part to economic reasons but also in order to take full advantage of the sheer processing power offered by today's technology. This eventually...
Provided by Dell
-
White Papers
Prevent critical coding defects early
Nov 2010
Intel® Inspector XE 2011 is a powerful and easy-to-use memory and threading error checking tool for C, C++, C# .NET, and Fortran developers designing serial and parallel applications on Windows*-...
Provided by Intel Corporation
-
White Papers
uFLIP: Understanding Flash IO Patterns
Jan 2009
Does the advent of flash devices constitute a radical change for secondary storage? How should database systems adapt to this new form of secondary storage? Before the authors can answer these...
Provided by University of Copenhagen
-
White Papers
Framework for Improving Parallelism by Write-Update Coherence Protocol in Distributed Shared Memory System
May 2008
For increasing parallelism in DSM System, the replication of data is to be done. The replication of data increases parallelism by allowing reads of the same data to be executed in parallel....
Provided by Academy Publisher
-
White Papers
Recursive Statistical Blockade: An Enhanced Technique for Rare Event Simulation With Application to SRAM Circuit Design
Jul 2007
Circuit reliability under statistical process variation is an area of growing concern. For highly replicated circuits such as SRAMs and flip flops, a rare statistical event for one circuit may...
Provided by Carnegie Mellon University
-
White Papers
Suitability of Requirements Abstraction Model (RAM) Requirements for High-Level System Testing
Jun 2009
The Requirements Abstraction Model (RAM) helps in managing abstraction in requirements by organizing them at four levels (product, feature, function and component). The RAM is adaptable and can be...
Provided by Katholieke Universiteit Leuven
-
White Papers
A Low Power SRAM Base on Novel Word-Line Decoding
Jun 2009
This paper proposes a low power SRAM based on five transistor SRAM cell. Proposed SRAM uses novel word-line decoding such that, during read/write operation, only selected cell connected to...
Provided by Islamic Azad University
-
White Papers
Memory Safety for Low-Level Software/Hardware Interactions
Jun 2009
Systems that enforce memory safety for today's operating system kernels and other system software do not account for the behavior of low-level software/hardware interactions such as memory-mapped...
Provided by University of Illinois
-
White Papers
A Scalable Memory Model for Low-Level Code
Oct 2008
Because of critical importance underlying all other software, low level system software is among the most important targets for formal verification. Low-level systems software must sometimes make...
Provided by University of British Columbia
-
White Papers
Memory Subsystem Simulation in Software TLM/T Models
Feb 2009
Design of Multiprocessor System-on-a-Chips requires efficient and accurate simulation of every component. Since the memory subsystem accounts for up to 50%of the performance and energy...
Provided by University of California
-
White Papers
Collecting Sensitive Information From Windows Physical Memory
Jan 2009
When investigators are faced with a target system, they want to find sensitive information such as userID and password. Unfortunately, sensitive information can not be found on the hard drive in...
Provided by Academy Publisher
-
White Papers
Time-Frequency Characterization of Long-Term Memory in Nonlinear Power Amplifiers
May 2008
This paper presents a new time-frequency characterization method for extracting the linear and third-order nonlinear parameters of a PA including long term memory. A dynamic frequency two-tone...
Provided by Institute of Electrical and Electronics Engineers
-
White Papers
Design and Implementation of 8K-Bits Low Power SRAM in 180nm Technology
Mar 2009
This paper explores the tradeoffs that are involved in the design of SRAM. The major components of an SRAM such as the row decoders, the memory cells and the sense amplifiers have been studied in...
Provided by SV College of Engineering & Technology
-
White Papers
Flashpower: A Detailed Power Model for Nand Flash Memory
Dec 2009
Flash memory is widely used in consumer electronics products, such as cell-phones and music players, and is increasingly displacing hard disk drives as the primary storage device in laptops,...
Provided by University of Virginia
-
White Papers
Attested Append-Only Memory: Making Adversaries Stick to Their Word
Oct 2007
Researchers have made great strides in improving the fault tolerance of both centralized and replicated systems against arbitrary (Byzantine) faults. However, there are hard limits to how much can...
Provided by Association for Computing Machinery
-
White Papers
Energy-Efficient Cluster Computing With FAWN: Workloads and Implications
Mar 2010
This paper presents the architecture and motivation for a cluster-based, many-core computing architecture for energy-efficient, data-intensive computing. FAWN, a Fast Array of Wimpy Nodes,...
Provided by Carnegie Mellon University
-
White Papers
FAWN: A Fast Array of Wimpy Nodes
Oct 2009
This paper presents a new cluster architecture for low-power data-intensive computing. FAWN couples low-power embedded CPUs to small amounts of local flash storage, and balances computation and...
Provided by Association for Computing Machinery
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White Papers
FAWNdamentally Power-Efficient Clusters
May 2009
Power is becoming an increasingly large financial and scaling burden for computing and society. The costs of running large data centers are becoming dominated by power and cooling to the degree...
Provided by Carnegie Mellon University
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White Papers
SSDAlloc: Hybrid SSD/RAM Memory Management Made Easy
Mar 2011
The authors introduce SSDAlloc, a hybrid main memory management system that allows developers to treat Solid-State Disk (SSD) as an extension of the RAM in a system. SSDAlloc moves the SSD upward...
Provided by Princeton University
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White Papers
Phase Change Technology and the Future of Main Memory
Mar 2010
Over the past few decades, memory technology scaling has provided many benefits, including increased density and capacity and reduced cost. Scaling has provided these benefits for conventional...
Provided by Institute of Electrical and Electronics Engineers
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White Papers
Guiding Architectural SRAM Models
Jan 2011
Caches, block memories, predictors, state tables, and other forms of on-chip memory are continuing to consume a greater portion of processor designs with each passing year. Making good...
Provided by University of California
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White Papers
Virtually Pipelined Network Memory
Sep 2006
The authors introduce virtually-pipelined memory, an architectural technique that efficiently supports high-bandwidth, uniform latency memory accesses, and high-confidence throughput even under...
Provided by University of California
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White Papers
3D Integration for Introspection
May 2007
Developing high-quality software for a modern computer system is no easy task. Performance-critical applications are likely to execute for quadrillions of instructions and operate in a complex...
Provided by Institute of Electrical and Electronics Engineers
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White Papers
IBM Cloud tip: A basic understanding of ephemeral storage
Apr 2011
Ephemeral disk storage, also known as local disk devices is an important component in using the IBM® SmartCloud. This article details the layout of the virtual disk drives available to the...
Provided by IBM
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White Papers
Load Miss Prediction - Exploiting Power Performance Trade-Offs
Jan 2007
Modern CPUs operate at GHz frequencies, but the latencies of memory accesses are still relatively large, in the order of hundreds of cycles. Deeper cache hierarchies with larger cache sizes can...
Provided by Institute of Electrical and Electronics Engineers
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White Papers
Abstract Storage Devices
Jun 2007
A quantum storage device differs radically from a conventional physical storage device. Its state can be set to any value in a certain (infinite) state space, but in general every possible read...
Provided by University of Cambridge
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White Papers
Logic, Design & Organization of PTVD-SHAM; a Parallel Time Varying & Data Super-Helical Access Memory
Oct 2007
This paper encompasses a super helical memory system's design, 'Boolean logic & image-logic' as a theoretical concept of an invention-model to 'Store time-data' in terms of anticipating the best...
Provided by University of Hull
