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asics - chip sets
(387 results)-
White Papers
A Methodology for Constraint-Driven Synthesis of On-Chip Communications
Mar 2009
The authors present a methodology and an optimization framework for the synthesis of on-chip communication through the assembly of components such as interfaces, routers, buses and links, from a...
Provided by Institute of Electrical and Electronics Engineers
-
White Papers
FPGA Real Time Acceleration for Discrete Wavelet Transform of the 5/3 Filter for JPEG2000 Standard
Mar 2012
In recent years video and image compression have became very required. The availability of powerful software design tools is a fundamental requirement to take advantage of the many advanced and...
Provided by Academy & Industry Research Collaboration Center
-
White Papers
Design and Optimization of Full Comparator Based on Quantum-Dot Cellular Automata
Apr 2012
Quantum-dot Cellular Automata (QCA) is one of the few alternative computing platforms that has the potential to be a promising technology because of higher speed, smaller size, and lower power...
Provided by ETRI Journal
-
White Papers
CTC Turbo Decoding Architecture for LTE Systems Implemented on FPGA
Feb 2012
This paper describes a turbo decoder for Long Term Evolution (LTE) standard, release 8, using a Max Log MAP algorithm. The Forward Error Correction (FEC) block dimensions, as indicated in the...
Provided by IARIA
-
White Papers
A Tool for Signal Probability Analysis of FPGA-Based Systems
Sep 2011
The authors describe a model of Field Programmable Gate Array based systems realised with the Stochastic Activity Networks formalism. The model can be used to debug the circuit design synthesised...
Provided by IARIA
-
White Papers
Design of Optimized Fuzzy Logic Controller for Area Minimisation and Its FPGA Implementation
Aug 2010
Area optimization is one of the important problems in reconfigurable systems. A Field-Programmable Gate Array (FPGA) based optimised Fuzzy Logic Controller (FLC) has been developed for speed...
Provided by International Journal of Computer Science and Network Security
-
Webcasts
What Components Are Inside My Computer?
Jan 2012
In this Webcast the presenter describes about the components inside the computer. The presenter also describes the major hardware components that can be found in their hardware tower with out help.
Provided by Videojug
-
Whitepapers
Low Complexity Hardware Implementation of V-BLAST Receiver
Apr 2008
This paper presents a simplified V-BLAST (Vertical Bell lab LAyered Spaced-Time) detection algorithm from the hardware implement perspective. Simulation shows that the BER (Bit Error Rate)...
Provided by Institute of Electrical & Electronic Engineers
-
Whitepapers
Low Power Implementation of Triple-Des Block 65nm Technology
May 2012
Power and delay are two main constraints in ASCI design. Trying to optimize the design with respect to power might result in an increase in the delay. This trade-off between power and delay are...
Provided by International Journal of Engineering Science and Technology (IJEST)
-
Whitepapers
Application Based Comparison of Different Analog to Digital Converter Architectures
Aug 2010
A review study of the most popular type of analog to digital converters-successive approximations, flash, pipelined and sigma-delta has been performed in this paper. The paper elaborates the...
Provided by International Journal of Engineering Science and Technology (IJEST)
-
Whitepapers
Design and Implementation of an Enhanced DDS Based Digital Modulator for Multiple Modulation Schemes
Jul 2011
This paper deals with the design & implementation of a Digital Modulator based on the FPGA. The design is implemented using the Enhanced Direct Digital Synthesis (DDS) Technology. The basic DDS...
Provided by Interscience Open Access Journals
-
Whitepapers
The Design and Development of Microstrip Patch Antenna Using Simulation Studies by ADS
Jan 2012
The matching network of a Microstrip Patch Antenna at 10.65 GHz was designed and developed using the software Advanced Design System (ADS). ADS is powerful software for designing microwave...
Provided by Interscience Open Access Journals
-
Whitepapers
ECEB: Enhanced Constraint Repetition Block for Regular Expression Matching on FPGA
Feb 2011
Recent Network Intrusion Detection Systems (NIDSs) utilize Perl Compatible Regular Expression to describe malicious patterns existing in the content payload of packets more and more efficiently....
Provided by HoChiMinh City University of Technology
-
Whitepapers
Multiplier Design and Performance Estimation With Distributed Arithmetic Algorithm
Jul 2012
A new architecture of Multiplier-and-Accumulator (MAC) for high-speed arithmetic. By combining multiplication with accumulation and devising a hybrid type of Carry Save Adder (CSA), the...
Provided by Interscience Open Access Journals
-
Whitepapers
A Novel Decode-Aware Compression Technique for Improved Compression and Decompression
Jul 2012
With compressed bit streams, more configuration information can be stored using the same memory. The access delay is also reduced, because less bits need to be transferred through the memory...
Provided by Interscience Open Access Journals
-
Whitepapers
FPGA Implementation of Four Phase Code Design Using Modified Genetic Algorithm (MGA)
Jul 2012
The proposed architecture consists of an efficient VLSI hardware implementation of the Modified Genetic Algorithm for identifying the good pulse compression sequences based on Discrimination...
Provided by International Journal of Advanced Research in Computer Engineering & Technology
-
Whitepapers
Design of Local Oscillator Circuit for FINFET and SET
Jul 2012
Nanometer scale devices have the potential of replacing the CMOS based device as because of low power operation. Nanotechnology is the new and challenging field or technology of 21st century....
Provided by International Journal of Advanced Research in Computer Engineering & Technology
-
Whitepapers
Low Power at Different Levels of VLSI Design and Clock Distribution Schemes
Jan 2011
Low power chip requirement in the VLSI industry is main considerable field due to the reduction of chip dimension day by day and environmental factors. In this paper various low power techniques...
Provided by International Journal of Computer Technology and Applications
-
Whitepapers
Comparison of Compaction Techniques in VLSI Physical Design
Jan 2011
The rapid growth in integration technology has been made possible by the automation of various steps involved in the design and fabrication of VLSI chips. The main factors which decide the quality...
Provided by International Journal of Computer Technology and Applications
-
Whitepapers
Low-Power Full Adder Array-Based Multiplier With Domino Logic
Jun 2012
A circuit design for a low-power full adder array-based multiplier in domino logic is proposed. It is based on Wallace tree technique. Clocked architecture results in lower power dissipation and...
Provided by International Journal of Advanced Research in Computer Engineering & Technology
-
Whitepapers
Development and Verification of VHDL Code for 16 Bit ADC for FPGA Based Beam Position Measurement Board
Jun 2012
FPGA based designed card provide several advantages over custom designed IC based cards such as reduced cost, reduction in components, reduction in size, easily coded. It is flexible because its...
Provided by International Journal of Advanced Research in Computer Engineering & Technology
-
Whitepapers
Survey on FPGA Routing Techniques
Jul 2012
Field Programmable Gate Array (FPGA), a programmable integrated circuit, has gained great popularity in the circuit design. Routing is an important part of FPGA design step which determines the...
Provided by Engg Journals Publications
-
Whitepapers
Augmenting Computer Architecture Classroom Experience With FPGAs Based Learning
Aug 2012
Computer architecture is often taught by using software to design and simulate hardware modules and then using individual components to implement them. The authors' aim of this paper is to share...
Provided by International Journal of Computer Theory and Engineering (IJCTE)
-
Whitepapers
Reversible Circuit Optimization Using PSO Algorithm
Jun 2012
Reversible Circuits Synthesis and optimization is one of the main terms dealt with in this paper. The synthesis and optimization of circuits using PSO algorithm is investigated in this paper. In...
Provided by Islamic Azad University
-
Whitepapers
The IP Soft-Core Design pf ADC and PLD Verification
Jul 2010
Analog to Digital Converters (ADC) are important components of the Input /Output system in a Large-Scale Integrated Circuit, And the applied value is very high. Such as wireless communications,...
Provided by Academy Publisher
-
White Papers
High-Volume Nano FPGAs: Going Where No FPGA Has Gone Before
Nov 2008
Electronic devices have found their way into every aspect of daily life. This popularity is driving demand for more portability and higher integration. While demand is increasing, design teams are...
Provided by Actel
-
White Papers
Orchid Technologies Engineering & Consulting, Inc.
Aug 2008
Shrinking product development cycles coupled with demanding product requirements and increasingly complex design implementations can overwhelm a design team. The technical risk of employing new,...
Provided by Orchid Technologies Engineering & Consulting
-
White Papers
Boosting System Performance With External Memory Solutions
Jun 2010
Over 70% of designs on Altera FPGAs require some type of external memory in the design, but the needs vary depending on the individual application. This white paper addresses all aspects of...
Provided by Altera
-
White Papers
Building an IP Surveillance Camera System With a Low-Cost FPGA
Jun 2010
In the video surveillance marketplace, the need for higher quality video, higher resolution, and more flexibility and features is driving the change from analog to digital cameras. By definition,...
Provided by Altera
-
White Papers
Accelerating DSP Designs With the Total 28-nm DSP Portfolio
Jul 2010
Implementing Digital Signal Processing (DSP) datapaths with different performance, precision, Intellectual Property (IP), and development flows is challenging and labor-intensive. As more and more...
Provided by Altera
-
White Papers
Understanding 40-nm FPGA Solutions for SATA/SAS
Jul 2010
Serial ATA (SATA) and Serial Attached SCSI (SAS) are computer bus standards that have the primary function of transferring data (directly or otherwise) between the motherboard and mass storage...
Provided by Altera
-
White Papers
Integrating 100-GbE Switching Solutions on 28-nm FPGAs
Jul 2010
With high-speed 100-GbE communication network standards converging, switching functions play a key role in the smooth functioning of the Internet. The aggregated network traffic doubles every six...
Provided by Altera
-
White Papers
Innovating With a Full Spectrum of 40-nm FPGAs and ASICs With Transceivers
Jul 2010
Increasing bandwidth requirements for broadband services are driving silicon vendors to use more and more high-speed serial transceivers. Therefore, next-generation applications feature a wide...
Provided by Altera
-
White Papers
Increasing Design Functionality With Partial and Dynamic Reconfiguration in 28-nm FPGAs
Jul 2010
The density of FPGAs has grown with each process node shrink. Compared to previous generations of FPGAs, the extra density, coupled with features such as reconfiguration, enables designers to add...
Provided by Altera
-
White Papers
Addressing 100-GbE Line-Card Design Challenges on 28-nm FPGAs
Jul 2010
As various standard bodies finalize their 100G standards for transport, Ethernet, and optical interfaces, FPGAs play a vital role for early adopters of technology who want to design 100G...
Provided by Altera
-
White Papers
Medical Imaging Implementation Using FPGAs
Jul 2010
Earlier prediction and treatment are driving the fusion of modalities such as Positron Emission Tomography (PET)/Computerized Tomography (CT) and X-ray/CT equipment. The higher image resolutions...
Provided by Altera
-
White Papers
Enhancing Robust SEU Mitigation With 28-nm FPGAs
Jul 2010
Systems designed with FPGAs benefit from significant improvements over ASICS, such as rapid-process technology scaling and design innovation, which permit the use of FPGAs in high-availability,...
Provided by Altera
-
White Papers
Guaranteeing Silicon Performance With FPGA Timing Models
Aug 2010
How can a designer accurately predict the time delays of a fully customizable integrated circuit? The answer to this question is "Not very easily." There are many factors that limit and increase...
Provided by Altera
-
White Papers
Implementing FIR Filters and FFTs With 28-nm Variable-Precision DSP Architecture
Sep 2010
Across a range of applications, the two most common functions implemented in FPGA-based high-performance signal processing are Finite Impulse Response (FIR) filters and fast Fourier transforms...
Provided by Altera
-
White Papers
Board Design Guidelines for LVDS Systems
Sep 2010
LVDS is a high-speed, low-voltage, low-power, and low-noise general-purpose I/O interface standard. The low-voltage swing and differential current mode outputs significantly reduce Electromagnetic...
Provided by Altera
-
White Papers
Fulfilling Technology Needs for 40G-100G Network-Centric Operations and Warfare
Sep 2010
The development and deployment of Network-Centric Operations and Warfare (NCOW) to integrate and connect the military's many separate networks relies on high-speed packet transport and optical...
Provided by Altera
-
White Papers
Achieving One TeraFLOPS With 28-nm FPGAs
Sep 2010
Due to recent technological developments, high-performance floating-point signal processing can, for the first time, be easily achieved using FPGAs. To date, virtually all FPGA-based signal...
Provided by Altera
-
White Papers
SCOC3: A Space Computer on a Chip - An Example of Successful Development of a Highly Integrated Innovative ASIC
Feb 2010
This paper presents the definition of an integrated processor core ASIC named SCOC3 which is designed for space computers. It also presents the validation method that has led to a successful ASIC...
Provided by Economic Development Association of Alabama
-
White Papers
New Intel® Atom™ Dev SDK brings enhancements & component integration
Jun 2010
The Intel® Atom™ Developer Program has just released Beta 3 of its Windows SDK. With this new release, there are a number of enhancements to assist with application development, and it offers a...
Provided by Intel
-
White Papers
Optimizing Power Distribution for High-Density Computing
Apr 2010
Choosing the right power distribution units for today and preparing for the future Fueled by the rapid rise of technologies such as virtualization and blade servers, computing densities in...
Provided by Eaton
-
Tools & Templates
Intel® Atom™ Developer Program's Million Dollar Developer Fund
Mar 2010
Netbooks' mobility and smaller screen sizes demand applications that are optimized for a mobile, on-the-go audience. The Intel Atom Developer Program Million Dollar Development Fund helps...
Provided by Intel
-
White Papers
Performance Advantage of Dell PowerEdge R900 over HP DL585 Running Microsoft Hyper-V
Sep 2008
Information Technology organizations are finding that combining today's industry standard servers based on multi-core processors with server virtualization can create highly efficient solutions. A...
Provided by Dell
-
White Papers
Windows ACPI Emulated Devices Table
Apr 2009
Modern PC platforms often use devices that have known errata. In this case, the Windows family of operating systems may include mechanisms to work around these known errata whenever possible. Two...
Provided by Microsoft
-
White Papers
Performance Report PRIMERGY RX300 S4
Dec 2007
The PRIMERGY RX300 S4 is a space-saving dual socket rack server which takes up just 2 height units and replaces the PRIMERGY RX300 S3. It has an Intel 5000P chipset, two Intel Dual-Core or...
Provided by Fujitsu Siemens
-
White Papers
Consolidating DSS Workloads on Dell PowerEdge 11G Servers Using Oracle 11g Database Replay
Apr 2009
Any server consolidation project must be preceded by a well-planned effort to predict the energy consumption and performance capacity of the new platform as compared to the legacy environment....
Provided by Dell
-
White Papers
Power Improvements on 2008 Desktop Platforms
Oct 2008
This paper presents platform- and silicon component power data that demonstrate advances in desktop platform power management enabled on 2008 platforms, built with the Intel Q45 Express Chipset,...
Provided by Intel
-
White Papers
Windows 7 - Mobile Broadband Certification for Existing Chipsets
Mar 2009
This paper provides information about Windows 7 support for Mobile Broadband. It provides guidelines for hardware manufacturers, original equipment manufacturers, and mobile network operators on...
Provided by Microsoft
-
White Papers
Orchid Technologies Engineering & Consulting, Inc.
Aug 2008
Shrinking product development cycles coupled with demanding product requirements and increasingly complex design implementations can overwhelm a design team. The technical risk of employing new,...
Provided by Orchid Technologies Engineering & Consulting
-
White Papers
High-Volume Nano FPGAs: Going Where No FPGA Has Gone Before
Nov 2008
Electronic devices have found their way into every aspect of daily life. This popularity is driving demand for more portability and higher integration. While demand is increasing, design teams are...
Provided by Actel
-
White Papers
A Methodology for Constraint-Driven Synthesis of On-Chip Communications
Mar 2009
The authors present a methodology and an optimization framework for the synthesis of on-chip communication through the assembly of components such as interfaces, routers, buses and links, from a...
Provided by Institute of Electrical and Electronics Engineers
-
White Papers
FPGA Real Time Acceleration for Discrete Wavelet Transform of the 5/3 Filter for JPEG2000 Standard
Mar 2012
In recent years video and image compression have became very required. The availability of powerful software design tools is a fundamental requirement to take advantage of the many advanced and...
Provided by Academy & Industry Research Collaboration Center
-
White Papers
Design and Optimization of Full Comparator Based on Quantum-Dot Cellular Automata
Apr 2012
Quantum-dot Cellular Automata (QCA) is one of the few alternative computing platforms that has the potential to be a promising technology because of higher speed, smaller size, and lower power...
Provided by ETRI Journal
-
White Papers
CTC Turbo Decoding Architecture for LTE Systems Implemented on FPGA
Feb 2012
This paper describes a turbo decoder for Long Term Evolution (LTE) standard, release 8, using a Max Log MAP algorithm. The Forward Error Correction (FEC) block dimensions, as indicated in the...
Provided by IARIA
-
White Papers
A Tool for Signal Probability Analysis of FPGA-Based Systems
Sep 2011
The authors describe a model of Field Programmable Gate Array based systems realised with the Stochastic Activity Networks formalism. The model can be used to debug the circuit design synthesised...
Provided by IARIA
-
White Papers
Design of Optimized Fuzzy Logic Controller for Area Minimisation and Its FPGA Implementation
Aug 2010
Area optimization is one of the important problems in reconfigurable systems. A Field-Programmable Gate Array (FPGA) based optimised Fuzzy Logic Controller (FLC) has been developed for speed...
Provided by International Journal of Computer Science and Network Security
-
Webcasts
What Components Are Inside My Computer?
Jan 2012
In this Webcast the presenter describes about the components inside the computer. The presenter also describes the major hardware components that can be found in their hardware tower with out help.
Provided by Videojug
-
Whitepapers
Low Complexity Hardware Implementation of V-BLAST Receiver
Apr 2008
This paper presents a simplified V-BLAST (Vertical Bell lab LAyered Spaced-Time) detection algorithm from the hardware implement perspective. Simulation shows that the BER (Bit Error Rate)...
Provided by Institute of Electrical & Electronic Engineers
-
Whitepapers
Low Power Implementation of Triple-Des Block 65nm Technology
May 2012
Power and delay are two main constraints in ASCI design. Trying to optimize the design with respect to power might result in an increase in the delay. This trade-off between power and delay are...
Provided by International Journal of Engineering Science and Technology (IJEST)
-
Whitepapers
Application Based Comparison of Different Analog to Digital Converter Architectures
Aug 2010
A review study of the most popular type of analog to digital converters-successive approximations, flash, pipelined and sigma-delta has been performed in this paper. The paper elaborates the...
Provided by International Journal of Engineering Science and Technology (IJEST)
-
Whitepapers
Design and Implementation of an Enhanced DDS Based Digital Modulator for Multiple Modulation Schemes
Jul 2011
This paper deals with the design & implementation of a Digital Modulator based on the FPGA. The design is implemented using the Enhanced Direct Digital Synthesis (DDS) Technology. The basic DDS...
Provided by Interscience Open Access Journals
-
Whitepapers
The Design and Development of Microstrip Patch Antenna Using Simulation Studies by ADS
Jan 2012
The matching network of a Microstrip Patch Antenna at 10.65 GHz was designed and developed using the software Advanced Design System (ADS). ADS is powerful software for designing microwave...
Provided by Interscience Open Access Journals
-
Whitepapers
ECEB: Enhanced Constraint Repetition Block for Regular Expression Matching on FPGA
Feb 2011
Recent Network Intrusion Detection Systems (NIDSs) utilize Perl Compatible Regular Expression to describe malicious patterns existing in the content payload of packets more and more efficiently....
Provided by HoChiMinh City University of Technology
-
Whitepapers
Multiplier Design and Performance Estimation With Distributed Arithmetic Algorithm
Jul 2012
A new architecture of Multiplier-and-Accumulator (MAC) for high-speed arithmetic. By combining multiplication with accumulation and devising a hybrid type of Carry Save Adder (CSA), the...
Provided by Interscience Open Access Journals
-
Whitepapers
A Novel Decode-Aware Compression Technique for Improved Compression and Decompression
Jul 2012
With compressed bit streams, more configuration information can be stored using the same memory. The access delay is also reduced, because less bits need to be transferred through the memory...
Provided by Interscience Open Access Journals
-
Whitepapers
FPGA Implementation of Four Phase Code Design Using Modified Genetic Algorithm (MGA)
Jul 2012
The proposed architecture consists of an efficient VLSI hardware implementation of the Modified Genetic Algorithm for identifying the good pulse compression sequences based on Discrimination...
Provided by International Journal of Advanced Research in Computer Engineering & Technology
-
Whitepapers
Design of Local Oscillator Circuit for FINFET and SET
Jul 2012
Nanometer scale devices have the potential of replacing the CMOS based device as because of low power operation. Nanotechnology is the new and challenging field or technology of 21st century....
Provided by International Journal of Advanced Research in Computer Engineering & Technology
-
Whitepapers
Low Power at Different Levels of VLSI Design and Clock Distribution Schemes
Jan 2011
Low power chip requirement in the VLSI industry is main considerable field due to the reduction of chip dimension day by day and environmental factors. In this paper various low power techniques...
Provided by International Journal of Computer Technology and Applications
-
Whitepapers
Comparison of Compaction Techniques in VLSI Physical Design
Jan 2011
The rapid growth in integration technology has been made possible by the automation of various steps involved in the design and fabrication of VLSI chips. The main factors which decide the quality...
Provided by International Journal of Computer Technology and Applications
-
Whitepapers
Low-Power Full Adder Array-Based Multiplier With Domino Logic
Jun 2012
A circuit design for a low-power full adder array-based multiplier in domino logic is proposed. It is based on Wallace tree technique. Clocked architecture results in lower power dissipation and...
Provided by International Journal of Advanced Research in Computer Engineering & Technology
-
Whitepapers
Development and Verification of VHDL Code for 16 Bit ADC for FPGA Based Beam Position Measurement Board
Jun 2012
FPGA based designed card provide several advantages over custom designed IC based cards such as reduced cost, reduction in components, reduction in size, easily coded. It is flexible because its...
Provided by International Journal of Advanced Research in Computer Engineering & Technology
-
Whitepapers
Survey on FPGA Routing Techniques
Jul 2012
Field Programmable Gate Array (FPGA), a programmable integrated circuit, has gained great popularity in the circuit design. Routing is an important part of FPGA design step which determines the...
Provided by Engg Journals Publications
-
Whitepapers
Augmenting Computer Architecture Classroom Experience With FPGAs Based Learning
Aug 2012
Computer architecture is often taught by using software to design and simulate hardware modules and then using individual components to implement them. The authors' aim of this paper is to share...
Provided by International Journal of Computer Theory and Engineering (IJCTE)
-
Whitepapers
Reversible Circuit Optimization Using PSO Algorithm
Jun 2012
Reversible Circuits Synthesis and optimization is one of the main terms dealt with in this paper. The synthesis and optimization of circuits using PSO algorithm is investigated in this paper. In...
Provided by Islamic Azad University
-
Whitepapers
The IP Soft-Core Design pf ADC and PLD Verification
Jul 2010
Analog to Digital Converters (ADC) are important components of the Input /Output system in a Large-Scale Integrated Circuit, And the applied value is very high. Such as wireless communications,...
Provided by Academy Publisher
-
White Papers
High-Volume Nano FPGAs: Going Where No FPGA Has Gone Before
Nov 2008
Electronic devices have found their way into every aspect of daily life. This popularity is driving demand for more portability and higher integration. While demand is increasing, design teams are...
Provided by Actel
-
White Papers
Orchid Technologies Engineering & Consulting, Inc.
Aug 2008
Shrinking product development cycles coupled with demanding product requirements and increasingly complex design implementations can overwhelm a design team. The technical risk of employing new,...
Provided by Orchid Technologies Engineering & Consulting
