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asics - chip sets
(387 results)-
White Papers
Leveraging Cost-Optimized FPGAs to Deliver OTN Mapper Solutions
Oct 2009
In telecommunications transport infrastructure, Optical Transport Network (OTN) and Gigabit Ethernet (GbE) protocols are being combined to create Packet-Optical Transport Networks (P-OTNs)....
Provided by Altera
-
White Papers
Using LEDs as Light-Level Sensors and Emitters
Oct 2009
Modulating LED power based on ambient light level increases battery life, a particularly helpful feature in a device where battery life is measured in days. Using a very simple circuit, Altera's...
Provided by Altera
-
White Papers
MAX Series Configuration Controller Using Flash Memory
Sep 2009
Configuration bitstream sizes are increasing with the introduction of higher-density FPGAs. This increase requires larger configuration devices to store the data and configure these FPGAs. As an...
Provided by Altera
-
White Papers
Implementing a Cost-Effective Human-Machine Interface for Home Appliances
Jul 2009
Traditionally, Human-Machine Interfaces (HMIs) for home appliances have been composed of mechanical devices such as buttons and knobs, coupled with display indicators such as Light-Emitting Diodes...
Provided by Altera
-
White Papers
Reduce Total System Cost in Portable Applications Using Zero-Power CPLDs
Jul 2009
Traditionally, portable system designers have used ASICs and ASSPs to implement memory interfaces, I/O expansion, power-on sequencing, discrete logic functions, display, and other functions in...
Provided by Altera
-
White Papers
Six Ways to Replace a Microcontroller With a CPLD
Jul 2009
This white paper discusses when it is advantageous to use a CPLD instead of a microcontroller, and when a CPLD makes a good companion to a microcontroller. The examples given in this white paper...
Provided by Altera
-
White Papers
Understanding Metastability in FPGAs
Jul 2009
Metastability is a phenomenon that can cause system failure in digital devices, including FPGAs, when a signal is transferred between circuitry in unrelated or asynchronous clock domains. This...
Provided by Altera
-
White Papers
Enabling Design Separation for High-Reliability and Information-Assurance Systems
Jun 2009
FPGAs are an ubiquitous part of today's processing technology. Their use has grown from traditional glue logic interfaces of the past to the most advanced information-processing systems used by...
Provided by Altera
-
White Papers
Protecting the FPGA Design From Common Threats
Jun 2009
The global estimated loss to counterfeiting is expected to exceed U.S.$1.5 trillion in 2009. Counterfeiting impacts all businesses in all markets, from Gucci handbags to computer chips to...
Provided by Altera
-
White Papers
FPGA Coprocessing Evolution: Sustained Performance Approaches Peak Performance
Jun 2009
FPGA architecture allows for many algorithm implementations where the sustained performance is much closer to the device's peak performance when compared to quad-core CPUs or GPGPUs. The strong...
Provided by Altera
-
White Papers
Generating Panoramic Views by Stitching Multiple Fisheye Images
May 2009
Fisheye cameras are finding an increasing number of applications in automobile imaging systems due to their ultra-wide-angle properties and cost-effectiveness. One such application renders a...
Provided by Altera
-
White Papers
FPGAs at 40 nm and >10 Gbps: Jitter-, Signal Integrity-, Power-, and Process-Optimized Transceivers
Apr 2009
This paper describes key technologies that enable Stratix IV GT FPGAs to deliver the performance and capabilities necessary to support 40G/100G applications with integrated 11.3-Gbps transceivers....
Provided by Altera
-
White Papers
Using FPGAs to Render Graphics and Drive LCD Interfaces
Apr 2009
This paper describes the use of FPGAs to add a LCD and GUI display to any embedded system. Unlike fixed processor device implementations, this approach is scalable and can support any display...
Provided by Altera
-
White Papers
Automating DSP Simulation and Implementation of Military Sensor Systems
Mar 2009
Military sensor-driven systems normally use FPGAs to interface with the Analog to Digital Converters (ADCs) that digitize sensor inputs. The ADCs operate at rates of up to 3 MSPS, which requires...
Provided by Altera
-
White Papers
Avoiding PCB Design Mistakes in FPGA-Based Systems
Mar 2009
System design using FPGAs is significantly different from the regular ASIC and processor-based system design. This white paper will examine some of the contributing factors, and more importantly,...
Provided by Altera
-
White Papers
Simplifying Simultaneous Multimode RRH Design
Mar 2009
RRH technology with support for simultaneous operation of multiple air-interface protocols is an emerging end-product requirement. The diverse modulation formats and sampling rates between...
Provided by Altera
-
White Papers
Video Processing on FPGAs for Military Electro-Optical/Infrared Applications
Mar 2009
Many of today's Electro-Optical/Infrared (EO/IR) systems require high-complexity, real-time video processing within a constrained power budget. The latest low-power, low-cost FPGA families - with...
Provided by Altera
-
White Papers
Generating Functionally Equivalent FPGAs and ASICs With a Single Set of RTL and Synthesis/Timing Constraints
Feb 2009
Electronic systems designers use FPGAs for their prototype implementations, taking advantage of the devices' reprogrammability to validate hardware and software. Once the design is ready for...
Provided by Altera
-
White Papers
Selecting the Ideal FPGA Vendor for Military Programs
Feb 2009
Developing a system design for government projects typically requires a defense contractor to evaluate and make system decisions based on documents such as a Request For Proposal (RFP), Statement...
Provided by Altera
-
White Papers
Image-Based Driver Assistance Development Environment
Dec 2008
This white paper describes a development environment for all Driver Assistance (DA) requirements using Altera FPGA and HardCopy ASIC devices. This development environment consists of a development...
Provided by Altera
-
White Papers
40-nm FPGA Power Management and Advantages
Dec 2008
The 40-nm process offers clear benefits over prior nodes, including the 65-nm node and the more recent 45-nm node. One of the most attractive benefits is higher integration, which enables...
Provided by Altera
-
White Papers
40-nm FPGAs: Architecture and Performance Comparison
Dec 2008
FPGA users are constantly looking for ways to differentiate their products in the market place and in doing so they define new systems with new requirements. The new requirements usually are...
Provided by Altera
-
White Papers
FPGAs Enable Energy-Efficient Motor Control in Next-Generation Smart Home Appliances
Nov 2008
Home appliances are at the heart of the modern lifestyle. Consumers want them "Smart," "Green," and, of course, always cheaper. All those diverging requirements have pushed today's home-appliance...
Provided by Altera
-
White Papers
Voltage Regulator Selection for FPGAs
Nov 2008
As FPGAs increase in sophistication to provide additional features such as Phase-Locked Loops (PLLs), memory interfaces, and transceiver functionality, the power requirements and designs for FPGAs...
Provided by Altera
-
White Papers
A Flexible Architecture for Fisheye Correction in Automotive Rear-View Cameras
Oct 2008
Fisheye cameras are finding an increasing number of applications in automobile rear-view imaging systems due to their ultra-wide-angle properties and cost-effectiveness. However, while fisheye...
Provided by Altera
-
White Papers
Applying Graphics to FPGA-Based Solutions
Sep 2008
Like it or not, the Apple iPhone has changed the game. Every device imaginable is getting a revamp with colorful displays and easy-to-use interfaces. Companies are racing frantically to be first...
Provided by Altera
-
White Papers
Creating Low-Cost Intelligent Display Modules With an FPGA and Embedded Processor
Sep 2008
LCDs are fast becoming a standard part of the automotive interior. As demand for LCD technology increases, so do methodologies for controlling and creating the displayed graphical content....
Provided by Altera
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White Papers
Hardware/Software Co-Verification Using FPGA Platforms
Aug 2008
The problem of hardware and software co-design is as old as systems design and the integration of systems composed of multiple elements. Systems built using electrical and electronic subsystems,...
Provided by Altera
-
White Papers
40-nm FPGAs and the Defense Electronic Design Organization
Jul 2008
With Altera's introduction of 40-nm FPGAs, the design domains of military electronics that can be addressed with Programmable Logic Devices (PLDs) are growing. This growth is a response to...
Provided by Altera
-
White Papers
DO-254 Support for FPGA Design Flows
Jul 2008
For most defense engineers, the first time they hear about the DO-254 Design Assurance Standard is in a request from their customer beginning with the words "Thou shalt comply with?" This leaves...
Provided by Altera
-
White Papers
Military Productivity Factors in Large FPGA Designs
Jul 2008
Changes in technology and requirements are leading to FPGAs playing larger roles in defense electronics designs, and consequently are creating both opportunities and risks. The opportunities...
Provided by Altera
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White Papers
DPA Circuitry and rx_dpa_locked Signal Behavior in Stratix III Devices
Jun 2008
The receiver PLL provides eight clock phases to the DPA circuitry. The eight clock phases are separated by 45° and at a frequency equal to the serial data rate. After power up or reset, the DPA...
Provided by Altera
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White Papers
Increasing Productivity With Quartus II Incremental Compilation
May 2008
Designers are creating FPGAs that continue to increase in logic density and performance, yet their time-to-market pressures are becoming even more demanding. Computing power is not increasing as...
Provided by Altera
-
White Papers
Supporting Unknown FREF Video Applications With PLLs
Mar 2008
Cyclone III Phase-Locked Loops (PLLs) are feature rich, supporting advanced capabilities such as clock switchover, dynamic phase shifting, and PLL reconfiguration. Previously, PLLs in Altera...
Provided by Altera
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White Papers
FPGA Run-Time Reconfiguration: Two Approaches
Mar 2008
Run-time reconfiguration for FPGA designs is an increasingly important requirement for many user markets, particularly military users who must adapt quickly to different threats and evolving...
Provided by Altera
-
White Papers
Increase Performance in Imaging Applications by Integrating DSP Functions With FPGAs
Mar 2008
Intevac is a leading developer of photonics products for commercial and military markets. This white paper describes the development of the embedded electronic systems for their NightVista...
Provided by Altera
-
White Papers
Increase Performance in Video and Image Processing Applications With FPGA Integration
Mar 2008
The JPEG2000 standard was developed to address a wide range of video and imaging applications, including medical imaging, military and security systems, and digital cinema. To enable these...
Provided by Altera
-
White Papers
Using FPGA-Based Channel Bonding for HDTV Over DSL
Feb 2008
This white paper examines the market opportunities for channel bonding technology and the threat from fiber-based networks and protocol details of the channel bonding process, as well as...
Provided by Altera
-
White Papers
Enabling New Infotainment-Equipment Cost Structures With Open-System Architectures
Feb 2008
The infotainment systems of Original Equipment Manufacturers (OEMs) recently have been subjected to increasing competition from the retrofitting solutions on the so-called aftermarket, for which...
Provided by Altera
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White Papers
The Quest for Digital Broadcast Quality: Addressing Quality Hot Spots
Feb 2008
Digital signal processing within Digital Televisions (DTVs) has advanced significantly, resulting in improved picture and audio quality. Further improvements in DTV technology over the next...
Provided by Altera
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Whitepapers
Development and Verification of VHDL Code for 16 Bit ADC for FPGA Based Beam Position Measurement Board
Jun 2012
FPGA based designed card provide several advantages over custom designed IC based cards such as reduced cost, reduction in components, reduction in size, easily coded. It is flexible because its...
Provided by International Journal of Advanced Research in Computer Engineering & Technology
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Whitepapers
Low-Power Full Adder Array-Based Multiplier With Domino Logic
Jun 2012
A circuit design for a low-power full adder array-based multiplier in domino logic is proposed. It is based on Wallace tree technique. Clocked architecture results in lower power dissipation and...
Provided by International Journal of Advanced Research in Computer Engineering & Technology
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Whitepapers
Comparison of Compaction Techniques in VLSI Physical Design
Jan 2011
The rapid growth in integration technology has been made possible by the automation of various steps involved in the design and fabrication of VLSI chips. The main factors which decide the quality...
Provided by International Journal of Computer Technology and Applications
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Whitepapers
Low Power at Different Levels of VLSI Design and Clock Distribution Schemes
Jan 2011
Low power chip requirement in the VLSI industry is main considerable field due to the reduction of chip dimension day by day and environmental factors. In this paper various low power techniques...
Provided by International Journal of Computer Technology and Applications
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Whitepapers
Design of Local Oscillator Circuit for FINFET and SET
Jul 2012
Nanometer scale devices have the potential of replacing the CMOS based device as because of low power operation. Nanotechnology is the new and challenging field or technology of 21st century....
Provided by International Journal of Advanced Research in Computer Engineering & Technology
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Whitepapers
FPGA Implementation of Four Phase Code Design Using Modified Genetic Algorithm (MGA)
Jul 2012
The proposed architecture consists of an efficient VLSI hardware implementation of the Modified Genetic Algorithm for identifying the good pulse compression sequences based on Discrimination...
Provided by International Journal of Advanced Research in Computer Engineering & Technology
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Whitepapers
A Novel Decode-Aware Compression Technique for Improved Compression and Decompression
Jul 2012
With compressed bit streams, more configuration information can be stored using the same memory. The access delay is also reduced, because less bits need to be transferred through the memory...
Provided by Interscience Open Access Journals
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Whitepapers
Multiplier Design and Performance Estimation With Distributed Arithmetic Algorithm
Jul 2012
A new architecture of Multiplier-and-Accumulator (MAC) for high-speed arithmetic. By combining multiplication with accumulation and devising a hybrid type of Carry Save Adder (CSA), the...
Provided by Interscience Open Access Journals
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Whitepapers
ECEB: Enhanced Constraint Repetition Block for Regular Expression Matching on FPGA
Feb 2011
Recent Network Intrusion Detection Systems (NIDSs) utilize Perl Compatible Regular Expression to describe malicious patterns existing in the content payload of packets more and more efficiently....
Provided by HoChiMinh City University of Technology
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Whitepapers
The Design and Development of Microstrip Patch Antenna Using Simulation Studies by ADS
Jan 2012
The matching network of a Microstrip Patch Antenna at 10.65 GHz was designed and developed using the software Advanced Design System (ADS). ADS is powerful software for designing microwave...
Provided by Interscience Open Access Journals
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Whitepapers
Design and Implementation of an Enhanced DDS Based Digital Modulator for Multiple Modulation Schemes
Jul 2011
This paper deals with the design & implementation of a Digital Modulator based on the FPGA. The design is implemented using the Enhanced Direct Digital Synthesis (DDS) Technology. The basic DDS...
Provided by Interscience Open Access Journals
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Whitepapers
Application Based Comparison of Different Analog to Digital Converter Architectures
Aug 2010
A review study of the most popular type of analog to digital converters-successive approximations, flash, pipelined and sigma-delta has been performed in this paper. The paper elaborates the...
Provided by International Journal of Engineering Science and Technology (IJEST)
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Whitepapers
Low Power Implementation of Triple-Des Block 65nm Technology
May 2012
Power and delay are two main constraints in ASCI design. Trying to optimize the design with respect to power might result in an increase in the delay. This trade-off between power and delay are...
Provided by International Journal of Engineering Science and Technology (IJEST)
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Whitepapers
Low Complexity Hardware Implementation of V-BLAST Receiver
Apr 2008
This paper presents a simplified V-BLAST (Vertical Bell lab LAyered Spaced-Time) detection algorithm from the hardware implement perspective. Simulation shows that the BER (Bit Error Rate)...
Provided by Institute of Electrical & Electronic Engineers
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Webcasts
What Components Are Inside My Computer?
Jan 2012
In this Webcast the presenter describes about the components inside the computer. The presenter also describes the major hardware components that can be found in their hardware tower with out help.
Provided by Videojug
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White Papers
Design of Optimized Fuzzy Logic Controller for Area Minimisation and Its FPGA Implementation
Aug 2010
Area optimization is one of the important problems in reconfigurable systems. A Field-Programmable Gate Array (FPGA) based optimised Fuzzy Logic Controller (FLC) has been developed for speed...
Provided by International Journal of Computer Science and Network Security
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White Papers
A Tool for Signal Probability Analysis of FPGA-Based Systems
Sep 2011
The authors describe a model of Field Programmable Gate Array based systems realised with the Stochastic Activity Networks formalism. The model can be used to debug the circuit design synthesised...
Provided by IARIA
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White Papers
CTC Turbo Decoding Architecture for LTE Systems Implemented on FPGA
Feb 2012
This paper describes a turbo decoder for Long Term Evolution (LTE) standard, release 8, using a Max Log MAP algorithm. The Forward Error Correction (FEC) block dimensions, as indicated in the...
Provided by IARIA
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White Papers
Design and Optimization of Full Comparator Based on Quantum-Dot Cellular Automata
Apr 2012
Quantum-dot Cellular Automata (QCA) is one of the few alternative computing platforms that has the potential to be a promising technology because of higher speed, smaller size, and lower power...
Provided by ETRI Journal
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White Papers
FPGA Real Time Acceleration for Discrete Wavelet Transform of the 5/3 Filter for JPEG2000 Standard
Mar 2012
In recent years video and image compression have became very required. The availability of powerful software design tools is a fundamental requirement to take advantage of the many advanced and...
Provided by Academy & Industry Research Collaboration Center
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White Papers
A Methodology for Constraint-Driven Synthesis of On-Chip Communications
Mar 2009
The authors present a methodology and an optimization framework for the synthesis of on-chip communication through the assembly of components such as interfaces, routers, buses and links, from a...
Provided by Institute of Electrical and Electronics Engineers
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White Papers
Distributed Flit-Buffer Flow Control for Networks-on-Chip
Oct 2008
The combination of flit-buffer flow control methods and latency-insensitive protocols is an effective solution for Networks-on-Chip (NoC). Since they both rely on backpressure, the two techniques...
Provided by Association for Computing Machinery
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White Papers
CTC: An End-to-End Flow Control Protocol for Multi-Core Systems-on-Chip
May 2009
The authors propose Connection Then Credits (CTC) as a new end-to-end flow control protocol to handle message-dependent deadlocks in Networks-on-Chip (NoC) for multi-core systems-on-chip. CTC is...
Provided by Institute of Electrical and Electronics Engineers
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White Papers
Sampling Correlation Sources for Timing Yield Analysis of Sequential Circuits With Clock Networks
Jun 2011
Analyzing timing yield under process variations is difficult because of the presence of correlations. Reconvergent Fan-Out Nodes (RFONs) within combinational subcircuits are a major source of...
Provided by World Scientific Publishing
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White Papers
High Speed and Low Power Dynamic Latched Comparator for PTL Circuit Applications
Jan 2012
Comparators are basic building blocks for designing modern mixed signal systems. Speed and resolution are two important factors which are required for high speed applications. This paper presents...
Provided by International Journal of Computer Science and Information Technologies
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White Papers
Integrating Logic Analyzer Functionality Into VHDL Designs
Jan 2012
A combined hardware and software system for the debugging of FPGA designs is designed. It provides a powerful logic analyzer implemented as a fully parameterized VHDL description. The system can...
Provided by International Journal of Computer Science and Information Technologies
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White Papers
Implementation of Area Efficient Memory-Based FIR Digital Filter Using LUT-Multiplier
Mar 2012
Memory based structures are well-suited for many Digital Signal Processing (DSP) applications, which involve multiplication with a fixed set of coefficients. Memory-based structures are more...
Provided by International Journal of Computer Science and Information Technologies
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White Papers
VLSI Implementation of Fast Convolution Based 2-D Discrete Wavelet Transform for High Speed, Area Efficient Image Computing
Mar 2012
A VLSI design approach of a high speed and real-time 2-D Discrete Wavelet Transform computing is being presented in the paper. The proposed architecture, based on new and fast convolution...
Provided by International Journal of Power Control Signal and Computation (IJPCSC)
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White Papers
LFSR Test Pattern for Fault Detection and Diagnosis for FPGA CLB Cells
Mar 2012
The increasing growth of sub-micron technology has resulted in the difficulty of VLSI testing. Test and design for testability are recognized today as critical to a successful design. Field...
Provided by International Journal of Advances in Engineering & Technology (IJAET)
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White Papers
Efficient Implementations of Discrete Wavelet Transforms Using FPGAs
Sep 2011
Recently, the Wavelet Transform has gained a lot of popularity in the field of signal and image processing. This is due to its capability of providing both time and frequency information...
Provided by International Journal of Advances in Engineering & Technology (IJAET)
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White Papers
Analog Integrated Circuit Design and Testing Using the Field Programmable Analog Array Technology
Sep 2011
Due to their reliability, performance and rapid prototyping, programmable logic devices overcome the use of ASICs in the digital system design. However, the similar solution for analog signals was...
Provided by International Journal of Advances in Engineering & Technology (IJAET)
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White Papers
Groestl Tweaks and Their Effect on FPGA Results
Nov 2011
The authors have performed the first order analysis of the influence of the Round 3 tweaks in Groestl on the performance of this algorithm in FPGAs. Both Groestl-0 and the revised Groestl have...
Provided by George Mason University
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White Papers
Random Number Generation Based on Oscillatory Metastability in Ring Circuits
Nov 2011
Random number generator designs are discussed, which utilize oscillatory metastability, induced by switching between two stable states of ring-connected digital gates. For a short time after the...
Provided by International Association for Cryptologic Research
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White Papers
Configurable M-Factor VLSI DVB-S2 LDPC Decoder Architecture With Optimized Memory Tiling Design
Mar 2012
Semi-parallel architectures for decoding Digital Video Broadcasting-Satellite 2 (DVB-S2) Low-Density Parity-Check (LDPC) codes have improved Very Large Scale Integration (VLSI) solutions, but...
Provided by EURASIP
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White Papers
Hardwired Networks on Chip in FPGAs to Unify Functional and Configuration Interconnects
Jan 2008
The authors propose that Networks on Chip (NOC) are hard-wired in Field-Programmable Gate Arrays (FPGA). Although some area of the FPGA then has a fixed function, this loss of flexibility is...
Provided by Delft University of Technology
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White Papers
Performance Analysis of Soft and Hard Single-Hop and Multi-Hop Circuit-Switched Interconnects for FPGAs
Jul 2008
This paper presents a performance analysis of hard and soft on-chip networks for FPGAs. The authors applied the Jackson's queuing model to analyze the performance of a MultiProcessor System on a...
Provided by Delft University of Technology
-
White Papers
Modeling Reconfiguration in a FPGA With a Hardwired Network on Chip
Feb 2009
The authors propose that FPGAs use a HardWired Network On Chip (HWNOC) as a unified interconnect for functional communications (data and control) as well as configuration (bitstreams for soft IP)....
Provided by Delft University of Technology
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White Papers
Resource-Efficient Real-Time Scheduling Using Credit-Controlled Static-Priority Arbitration
Jun 2011
A present-day System-on-Chip (SoC) runs a wide range of applications with diverse real-time requirements. Resources, such as processors, interconnects and memories, are shared between these...
Provided by Eindhoven University of Technology (TU/e)
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White Papers
Hierarchical Segmentation for Hardware Function Evaluation
Dec 2008
This paper presents a method for evaluating functions based on piecewise polynomial approximations (splines) with a hierarchical segmentation scheme targeting hardware implementation. The...
Provided by Institute of Electrical and Electronics Engineers
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White Papers
A Methodology and Tool Framework for Supporting Rapid Exploration of Memory Hierarchies in FPGAs
Dec 2010
This paper introduces a novel methodology for enabling rapid exploration of memory hierarchies onto FPGA devices. The methodology is software supported by a new open-source tool framework, named...
Provided by National Technical University of Athens
-
White Papers
Using LEDs as Light-Level Sensors and Emitters
Oct 2009
Modulating LED power based on ambient light level increases battery life, a particularly helpful feature in a device where battery life is measured in days. Using a very simple circuit, Altera's...
Provided by Altera
-
White Papers
MAX Series Configuration Controller Using Flash Memory
Sep 2009
Configuration bitstream sizes are increasing with the introduction of higher-density FPGAs. This increase requires larger configuration devices to store the data and configure these FPGAs. As an...
Provided by Altera
-
White Papers
Implementing a Cost-Effective Human-Machine Interface for Home Appliances
Jul 2009
Traditionally, Human-Machine Interfaces (HMIs) for home appliances have been composed of mechanical devices such as buttons and knobs, coupled with display indicators such as Light-Emitting Diodes...
Provided by Altera
-
White Papers
Reduce Total System Cost in Portable Applications Using Zero-Power CPLDs
Jul 2009
Traditionally, portable system designers have used ASICs and ASSPs to implement memory interfaces, I/O expansion, power-on sequencing, discrete logic functions, display, and other functions in...
Provided by Altera
-
White Papers
Six Ways to Replace a Microcontroller With a CPLD
Jul 2009
This white paper discusses when it is advantageous to use a CPLD instead of a microcontroller, and when a CPLD makes a good companion to a microcontroller. The examples given in this white paper...
Provided by Altera
-
White Papers
Understanding Metastability in FPGAs
Jul 2009
Metastability is a phenomenon that can cause system failure in digital devices, including FPGAs, when a signal is transferred between circuitry in unrelated or asynchronous clock domains. This...
Provided by Altera
-
White Papers
Enabling Design Separation for High-Reliability and Information-Assurance Systems
Jun 2009
FPGAs are an ubiquitous part of today's processing technology. Their use has grown from traditional glue logic interfaces of the past to the most advanced information-processing systems used by...
Provided by Altera
-
White Papers
Protecting the FPGA Design From Common Threats
Jun 2009
The global estimated loss to counterfeiting is expected to exceed U.S.$1.5 trillion in 2009. Counterfeiting impacts all businesses in all markets, from Gucci handbags to computer chips to...
Provided by Altera
-
White Papers
FPGA Coprocessing Evolution: Sustained Performance Approaches Peak Performance
Jun 2009
FPGA architecture allows for many algorithm implementations where the sustained performance is much closer to the device's peak performance when compared to quad-core CPUs or GPGPUs. The strong...
Provided by Altera
-
White Papers
Generating Panoramic Views by Stitching Multiple Fisheye Images
May 2009
Fisheye cameras are finding an increasing number of applications in automobile imaging systems due to their ultra-wide-angle properties and cost-effectiveness. One such application renders a...
Provided by Altera
-
White Papers
FPGAs at 40 nm and >10 Gbps: Jitter-, Signal Integrity-, Power-, and Process-Optimized Transceivers
Apr 2009
This paper describes key technologies that enable Stratix IV GT FPGAs to deliver the performance and capabilities necessary to support 40G/100G applications with integrated 11.3-Gbps transceivers....
Provided by Altera
-
White Papers
Using FPGAs to Render Graphics and Drive LCD Interfaces
Apr 2009
This paper describes the use of FPGAs to add a LCD and GUI display to any embedded system. Unlike fixed processor device implementations, this approach is scalable and can support any display...
Provided by Altera
-
White Papers
Automating DSP Simulation and Implementation of Military Sensor Systems
Mar 2009
Military sensor-driven systems normally use FPGAs to interface with the Analog to Digital Converters (ADCs) that digitize sensor inputs. The ADCs operate at rates of up to 3 MSPS, which requires...
Provided by Altera
-
White Papers
Avoiding PCB Design Mistakes in FPGA-Based Systems
Mar 2009
System design using FPGAs is significantly different from the regular ASIC and processor-based system design. This white paper will examine some of the contributing factors, and more importantly,...
Provided by Altera
-
White Papers
Simplifying Simultaneous Multimode RRH Design
Mar 2009
RRH technology with support for simultaneous operation of multiple air-interface protocols is an emerging end-product requirement. The diverse modulation formats and sampling rates between...
Provided by Altera
-
White Papers
Video Processing on FPGAs for Military Electro-Optical/Infrared Applications
Mar 2009
Many of today's Electro-Optical/Infrared (EO/IR) systems require high-complexity, real-time video processing within a constrained power budget. The latest low-power, low-cost FPGA families - with...
Provided by Altera
-
White Papers
Generating Functionally Equivalent FPGAs and ASICs With a Single Set of RTL and Synthesis/Timing Constraints
Feb 2009
Electronic systems designers use FPGAs for their prototype implementations, taking advantage of the devices' reprogrammability to validate hardware and software. Once the design is ready for...
Provided by Altera
-
White Papers
Selecting the Ideal FPGA Vendor for Military Programs
Feb 2009
Developing a system design for government projects typically requires a defense contractor to evaluate and make system decisions based on documents such as a Request For Proposal (RFP), Statement...
Provided by Altera
-
White Papers
Image-Based Driver Assistance Development Environment
Dec 2008
This white paper describes a development environment for all Driver Assistance (DA) requirements using Altera FPGA and HardCopy ASIC devices. This development environment consists of a development...
Provided by Altera
-
White Papers
40-nm FPGA Power Management and Advantages
Dec 2008
The 40-nm process offers clear benefits over prior nodes, including the 65-nm node and the more recent 45-nm node. One of the most attractive benefits is higher integration, which enables...
Provided by Altera
-
White Papers
40-nm FPGAs: Architecture and Performance Comparison
Dec 2008
FPGA users are constantly looking for ways to differentiate their products in the market place and in doing so they define new systems with new requirements. The new requirements usually are...
Provided by Altera
-
White Papers
FPGAs Enable Energy-Efficient Motor Control in Next-Generation Smart Home Appliances
Nov 2008
Home appliances are at the heart of the modern lifestyle. Consumers want them "Smart," "Green," and, of course, always cheaper. All those diverging requirements have pushed today's home-appliance...
Provided by Altera
-
White Papers
Voltage Regulator Selection for FPGAs
Nov 2008
As FPGAs increase in sophistication to provide additional features such as Phase-Locked Loops (PLLs), memory interfaces, and transceiver functionality, the power requirements and designs for FPGAs...
Provided by Altera
-
White Papers
A Flexible Architecture for Fisheye Correction in Automotive Rear-View Cameras
Oct 2008
Fisheye cameras are finding an increasing number of applications in automobile rear-view imaging systems due to their ultra-wide-angle properties and cost-effectiveness. However, while fisheye...
Provided by Altera
-
White Papers
Applying Graphics to FPGA-Based Solutions
Sep 2008
Like it or not, the Apple iPhone has changed the game. Every device imaginable is getting a revamp with colorful displays and easy-to-use interfaces. Companies are racing frantically to be first...
Provided by Altera
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White Papers
Creating Low-Cost Intelligent Display Modules With an FPGA and Embedded Processor
Sep 2008
LCDs are fast becoming a standard part of the automotive interior. As demand for LCD technology increases, so do methodologies for controlling and creating the displayed graphical content....
Provided by Altera
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White Papers
Hardware/Software Co-Verification Using FPGA Platforms
Aug 2008
The problem of hardware and software co-design is as old as systems design and the integration of systems composed of multiple elements. Systems built using electrical and electronic subsystems,...
Provided by Altera
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White Papers
40-nm FPGAs and the Defense Electronic Design Organization
Jul 2008
With Altera's introduction of 40-nm FPGAs, the design domains of military electronics that can be addressed with Programmable Logic Devices (PLDs) are growing. This growth is a response to...
Provided by Altera
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White Papers
DO-254 Support for FPGA Design Flows
Jul 2008
For most defense engineers, the first time they hear about the DO-254 Design Assurance Standard is in a request from their customer beginning with the words "Thou shalt comply with?" This leaves...
Provided by Altera
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White Papers
Military Productivity Factors in Large FPGA Designs
Jul 2008
Changes in technology and requirements are leading to FPGAs playing larger roles in defense electronics designs, and consequently are creating both opportunities and risks. The opportunities...
Provided by Altera
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White Papers
DPA Circuitry and rx_dpa_locked Signal Behavior in Stratix III Devices
Jun 2008
The receiver PLL provides eight clock phases to the DPA circuitry. The eight clock phases are separated by 45° and at a frequency equal to the serial data rate. After power up or reset, the DPA...
Provided by Altera
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White Papers
Increasing Productivity With Quartus II Incremental Compilation
May 2008
Designers are creating FPGAs that continue to increase in logic density and performance, yet their time-to-market pressures are becoming even more demanding. Computing power is not increasing as...
Provided by Altera
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White Papers
Supporting Unknown FREF Video Applications With PLLs
Mar 2008
Cyclone III Phase-Locked Loops (PLLs) are feature rich, supporting advanced capabilities such as clock switchover, dynamic phase shifting, and PLL reconfiguration. Previously, PLLs in Altera...
Provided by Altera
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White Papers
FPGA Run-Time Reconfiguration: Two Approaches
Mar 2008
Run-time reconfiguration for FPGA designs is an increasingly important requirement for many user markets, particularly military users who must adapt quickly to different threats and evolving...
Provided by Altera
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White Papers
Increase Performance in Imaging Applications by Integrating DSP Functions With FPGAs
Mar 2008
Intevac is a leading developer of photonics products for commercial and military markets. This white paper describes the development of the embedded electronic systems for their NightVista...
Provided by Altera
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White Papers
Increase Performance in Video and Image Processing Applications With FPGA Integration
Mar 2008
The JPEG2000 standard was developed to address a wide range of video and imaging applications, including medical imaging, military and security systems, and digital cinema. To enable these...
Provided by Altera
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White Papers
Using FPGA-Based Channel Bonding for HDTV Over DSL
Feb 2008
This white paper examines the market opportunities for channel bonding technology and the threat from fiber-based networks and protocol details of the channel bonding process, as well as...
Provided by Altera
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White Papers
Enabling New Infotainment-Equipment Cost Structures With Open-System Architectures
Feb 2008
The infotainment systems of Original Equipment Manufacturers (OEMs) recently have been subjected to increasing competition from the retrofitting solutions on the so-called aftermarket, for which...
Provided by Altera
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White Papers
The Quest for Digital Broadcast Quality: Addressing Quality Hot Spots
Feb 2008
Digital signal processing within Digital Televisions (DTVs) has advanced significantly, resulting in improved picture and audio quality. Further improvements in DTV technology over the next...
Provided by Altera
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White Papers
Developing MSAN Equipment Using Low-Cost FPGAs
Jan 2008
This paper looks at the trends in the Multi-Service Access Node (MSAN) equipment market that are forcing developers to re-examine the architectures they have used in the past, as well as driving...
Provided by Altera
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