- Subscribe to this page:
- RSS
- Email Alert
components
(1543 results)Search the Library
Mission Statement
TechRepublic's ITPapers is the Web's largest library of free technical IT white papers, webcasts, and case studies. Covering IT categories including Data Management, IT Management, Networking, Communications, Enterprise Applications, Storage, Security and much more, TechRepublic's White Paper Directory is the best source for technical white papers and IT information.
-
White Papers
A Method for Analysis of Industrial Distributed Embedded Systems
Jun 2009
The paper presents a set of guidelines for analysis of industrial embedded distributed systems and introduces a mathematical model derived from these guidelines. In this study, the author examines...
Provided by Riga Technical University
-
White Papers
The Enabling of an Execute-in-Place Architecture to Reduce the Embedded System Memory Footprint and Boot Time
Jan 2008
Success in the embedded world revolves around two key concepts: cost effectiveness and performance. The ability for an operating system to boot quickly combined with speedy application usage at...
Provided by Academy Publisher
-
White Papers
On the Design of Low-Power Cache Memories for Homogeneous Multi-Core Processors
Feb 2010
This paper investigates the impact of Level-1 Cache (CL1) parameters, Level-2 Cache (CL2) parameters, and cache organizations on the power consumption and performance of multi-core systems. The...
Provided by Institute of Electrical and Electronics Engineers
-
White Papers
Impact of Level-2 Cache Sharing on the Performance and Power Requirements of Homogeneous Multicore Embedded Systems
Jun 2009
In order to satisfy the needs for increasing computer processing power, there are significant changes in the design process of modern computing systems. Major chip-vendors are deploying multicore...
Provided by Reed Elsevier
-
White Papers
Feedback Thermal Control of Real-Time Systems on Multicore Processors
Jan 2011
Real-time systems face significant challenges in thermal management with their adoption of modern multicore processors. While earlier research on feedback thermal control has shown promise in...
Provided by Washington University in St. Louis
-
White Papers
Online Adaptive Utilization Control for Real-Time Embedded Multiprocessor Systems
Oct 2008
To provide Quality of Service (QoS) guarantees in open and unpredictable environments, the utilization control problem is defined to keep the processor utilization at the schedulable utilization...
Provided by Association for Computing Machinery
-
White Papers
Run-Time Thermal Management of Three-Dimensional Chip-Multiprocessors
May 2008
Three-dimensional (3D) integration has the potential to improve the communication latency and integration density of chip-level multiprocessors (CMPs). However, the stacked high power density...
Provided by Northwestern University
-
White Papers
User-And Process-Driven Dynamic Voltage and Frequency Scaling
Feb 2009
The authors describe and evaluate two new, independently-applicable power reduction techniques for power management on processors that support Dynamic Voltage and Frequency Scaling (DVFS):...
Provided by Northwestern University
-
White Papers
Temperature-Aware Scheduling and Assignment for Hard Real-Time Applications on MPSoCs
Jul 2010
Increasing Integrated Circuit (IC) power densities and temperatures may hamper MultiProcessor System-on-Chip (MPSoC) use in hard real-time systems. This paper formalizes the temperature-aware...
Provided by Institute of Electrical and Electronics Engineers
-
White Papers
C-Pack: A High-Performance Microprocessor Cache Compression Algorithm
Sep 2009
Microprocessor designers have been torn between tight constraints on the amount of on-chip cache memory and the high latency of off-chip memory, such as dynamic random access memory. Accessing...
Provided by Institute of Electrical and Electronics Engineers
-
White Papers
Characterization of Single-Electron Tunneling Transistors for Designing Low-Power Embedded Systems
Apr 2008
Minimizing power consumption is vitally important in embedded system design; power consumption determines battery lifespan. Ultra-low-power designs may even permit embedded systems to operate...
Provided by Northwestern University
-
White Papers
Three-Dimensional Chip-Multiprocessor Run-Time Thermal Management
Aug 2008
Three-dimensional integration has the potential to improve the communication latency and integration density of Chip-level MultiProcessors (CMPs). However, the stacked highpower density layers of...
Provided by Institute of Electrical and Electronics Engineers
-
White Papers
Application-Specific MPSoC Reliability Optimization
May 2008
This paper presents modeling and estimation techniques permitting the temperature-aware optimization of application-specific MultiProcessor System-on-Chip (MPSoC) reliability. Technology scaling...
Provided by Institute of Electrical and Electronics Engineers
-
White Papers
Performance and Power Modeling in a Multi-Programmed Multi-Core Environment
Jun 2010
This paper describes a fast, automated technique for accurate on-line estimation of the performance and power consumption of interacting processes in a multi-programmed, multi-core environment....
Provided by Association for Computing Machinery
-
White Papers
Multi-Optimization Power Management for Chip Multiprocessors
Oct 2008
The emergence of power as a first-class design constraint has fueled the proposal of a growing number of run-time power optimizations. Many of these optimizations trade-off power saving...
Provided by Association for Computing Machinery
-
White Papers
Power Deregulation: Eliminating OffChip Voltage Regulation Circuitry From Embedded Systems
Oct 2007
In battery-powered embedded systems, dedicated circuitry is used to convert stored energy into a form that can be directly used by processors. These power regulation devices seek to mask non-ideal...
Provided by Association for Computing Machinery
-
White Papers
Three-Dimensional Multiprocessor System-on-Chip Thermal Optimization
Oct 2007
3D stacked wafer integration has the potential to improve MultiProcessor System-on-Chip (MPSoC) integration density, performance, and power efficiency. However, the power density of 3D MPSoCs...
Provided by Association for Computing Machinery
-
White Papers
Power Reduction Through Measurement and Modeling of Users and CPUs: Summary
Jun 2007
Dynamic Voltage and Frequency Scaling (DVFS) is one of the most commonly used power reduction techniques in high-performance processors. DVFS varies the frequency and voltage of a microprocessor...
Provided by Association for Computing Machinery
-
White Papers
The Mobile Sensing Platform: An Embedded Activity Recognition System
Apr 2008
Activity-aware systems have inspired novel user interfaces and new applications in smart environments, surveillance, emergency response, and military missions. Systems that recognize human...
Provided by Institute of Electrical and Electronics Engineers
-
White Papers
Maestro: Orchestrating Lifetime Reliability in Chip Multiprocessors
Nov 2009
As CMOS feature sizes venture deep into the nanometer regime, wearout mechanisms including negative-bias temperature instability and time-dependent dielectric breakdown can severely reduce...
Provided by University of Michigan
-
White Papers
Putting Faulty Cores to Work
Nov 2010
Since the non-cache parts of a core are less regular, compared to on-chip caches, tolerating manufacturing defects in the processing core is a more challenging problem. Due to the lack of...
Provided by University of Michigan
-
White Papers
A Power-Efficient 32 Bit ARM Processor Using Timing-Error Detection and Correction for Transient-Error Tolerance and Adaptation to PVT Variation
Jan 2010
Razor is a hybrid technique for dynamic detection and correction of timing errors. A combination of error detecting circuits and micro-architectural recovery mechanisms creates a system that is...
Provided by Institute of Electrical and Electronics Engineers
-
White Papers
Bridging the Computation Gap Between Programmable Processors and Hardwired Accelerators
Dec 2008
New media and signal processing applications demand ever higher performance while operating within the tight power constraints of mobile devices. A range of hardware implementations is available...
Provided by University of Michigan
-
White Papers
DVFS in Loop Accelerators Using BLADES
Jun 2008
Hardware accelerators are common in embedded systems that have high performance requirements but must still operate within stringent energy constraints. To facilitate short time-to-market and...
Provided by Association for Computing Machinery
-
White Papers
Stream Compilation for Real-Time Embedded Multicore Systems
Mar 2009
Multicore systems have not only become ubiquitous in the desktop and server worlds, but are also becoming the standard in the embedded space. Multicore offers programmability and flexibility over...
Provided by University of Michigan
-
White Papers
A Parameterized Dataflow Language Extension for Embedded Streaming Systems
Apr 2008
Many embedded DSP systems can be characterized as streaming applications. Imperative programming languages are ill suited for describing the concurrency within these DSP systems. SPEX is a...
Provided by Arizona State University
-
White Papers
Experiences of Designing and Deploying Intelligent Sensor Nodes to Monitor Hand-Arm Vibrations in the Field
Jun 2007
The NEMO project is exploring the use of mobile sensor nodes to augment physical work artefacts in order to ensure compliance with health and safety regulations. In this paper the authors present...
Provided by Association for Computing Machinery
-
White Papers
ViRe: Virtual Reconfiguration Framework for Embedded Processing in Distributed Image Sensors
Feb 2008
Image processing applications introduce new challenges to the design of sensor network systems via non-trivial in-network computation. As embedded processing becomes more complex, in-situ...
Provided by University of California
-
White Papers
Variability-Aware Duty Cycle Scheduling in Long Running Embedded Sensing Systems
Dec 2010
Instance and temperature-dependent leakage power variability is already a significant issue in contemporary embedded processors, and one which is expected to increase in importance with scaling of...
Provided by University of California
-
White Papers
A Case for Opportunistic Embedded Sensing in Presence of Hardware Power Variability
Sep 2010
The system lifetime gains provided by the various power management techniques in embedded sensing systems are a strong function of the active and sleep mode power consumption of the underlying...
Provided by University of California
-
White Papers
Knots: An Efficient Single Stack Preemption Mechanism for Resource Constrained Devices
Oct 2007
The low-end embedded systems space is characterized by two classes of operating systems: Run-To-Completion (RTC) systems such as Tenos and preemptive multithreading systems such as Mantis. In RTC...
Provided by University of California
-
White Papers
Optimizing Bandwidth of Call Traces for Wireless Embedded Systems
Jul 2009
Call traces expose runtime behaviors that greatly aid system developers in profiling performance and diagnosing problems within wireless embedded applications. Strict resource constraints limit...
Provided by Institute of Electrical and Electronics Engineers
-
White Papers
Flashpower: A Detailed Power Model for Nand Flash Memory
Dec 2009
Flash memory is widely used in consumer electronics products, such as cell-phones and music players, and is increasingly displacing hard disk drives as the primary storage device in laptops,...
Provided by University of Virginia
-
White Papers
Exploring the Thermal Impact on Manycore Processor Performance
Feb 2010
Performance of processors with many simple parallel cores is limited by the serial part of the workload, requiring an asymmetric core organization with one or more aggressive "Primary" cores for...
Provided by Institute of Electrical and Electronics Engineers
-
White Papers
Interaction of Scaling Trends in Processor Architecture and Cooling
Feb 2010
It is predicted that two important trends are likely to accompany traditional CMOS semiconductor technology scaling chip multiprocessors and 3D integration. With the ever increasing power...
Provided by Institute of Electrical and Electronics Engineers
-
White Papers
Cell-SWat: Modeling and Scheduling Wavefront Computations on the Cell Broadband Engine
May 2008
This paper presents and evaluates a model and a methodology for implementing parallel wavefront algorithms on the Cell Broadband Engine. Wavefront algorithms are vital in several application areas...
Provided by Association for Computing Machinery
-
White Papers
A Pluggable Framework for Parallel Pairwise Sequence Search
Jun 2007
The current and near future of the computing industry is one of multi-core and multi-processor technology. Most existing sequence-search tools have been designed with a focus on single-core,...
Provided by Virginia Tech
-
White Papers
Accelerating Electrostatic Surface Potential Calculation With Multi-Scale Approximation on Graphics Processing Units
May 2010
Tools that compute and visualize biomolecular electrostatic surface potential have been used extensively for studying biomolecular function. However, determining the surface potential for large...
Provided by Reed Elsevier
-
White Papers
Impact of Network Sharing in Multi-Core Architectures
May 2007
As commodity components continue to dominate the realm of high-end computing, two hardware trends have emerged as major contributors high-speed networking technologies and multi-core...
Provided by Argonne National Laboratory
-
White Papers
Modeling and Analysis of Power in Multicore Network Processors
Feb 2008
With the emergence of multi-core network processors in support of high-performance computing and networking applications, power consumption has become a problem of increasing significance....
Provided by University of Massachusetts Lowell
-
Whitepapers
Design & Implementation of 64 bit ALU for Instruction Set Architecture & Comparison Between Speed/Power Consumption on FPGA
Jun 2012
In the paper design of 64 bit ALU is presented. Arithmetic Logical Unit is the part of Microprocessor. All the arithmetic & logical functions are performed inside the ALU. So, ALU is the heart of...
Provided by International Journal of Advanced Research in Computer Engineering & Technology
-
Whitepapers
Low-Power Full Adder Array-Based Multiplier With Domino Logic
Jun 2012
A circuit design for a low-power full adder array-based multiplier in domino logic is proposed. It is based on Wallace tree technique. Clocked architecture results in lower power dissipation and...
Provided by International Journal of Advanced Research in Computer Engineering & Technology
-
Whitepapers
Comparison of Compaction Techniques in VLSI Physical Design
Jan 2011
The rapid growth in integration technology has been made possible by the automation of various steps involved in the design and fabrication of VLSI chips. The main factors which decide the quality...
Provided by International Journal of Computer Technology and Applications
-
Whitepapers
Low Power at Different Levels of VLSI Design and Clock Distribution Schemes
Jan 2011
Low power chip requirement in the VLSI industry is main considerable field due to the reduction of chip dimension day by day and environmental factors. In this paper various low power techniques...
Provided by International Journal of Computer Technology and Applications
-
Whitepapers
Design of Local Oscillator Circuit for FINFET and SET
Jul 2012
Nanometer scale devices have the potential of replacing the CMOS based device as because of low power operation. Nanotechnology is the new and challenging field or technology of 21st century....
Provided by International Journal of Advanced Research in Computer Engineering & Technology
-
Whitepapers
8-Bit Risc Processor Using Harvard Architecture
Jul 2012
Processors are the heart of all "Smart" devices, whether they be electronic devices or otherwise. Their smartness comes as a direct result of the decisions and controls that processor makes. For...
Provided by International Journal of Advanced Research in Computer Engineering & Technology
-
Whitepapers
STM: Lock-Free Synchronization
Jan 2012
Current parallel programming uses low-level programming constructs like threads and explicit synchronization (for example, locks, semaphores and monitors) to coordinate thread execution which...
Provided by Interscience Open Access Journals
-
Whitepapers
Embedded Programmable Web-Based ECG Monitoring & Detection System Using a Fast Algorithm
Jul 2012
The physicians have to interpret this large amount of ECG data to search for only a few abnormal beats in the ECG. Physicians may overlook some abnormal cycles due to fatigue and human error in...
Provided by Interscience Open Access Journals
-
Whitepapers
Multiplier Design and Performance Estimation With Distributed Arithmetic Algorithm
Jul 2012
A new architecture of Multiplier-and-Accumulator (MAC) for high-speed arithmetic. By combining multiplication with accumulation and devising a hybrid type of Carry Save Adder (CSA), the...
Provided by Interscience Open Access Journals
-
Whitepapers
A Natural Language Query Processor for Database Interface
Feb 2012
With the increasing amount of information available on the Internet one of the most challenging tasks is to provide search interfaces that are easy to use without having to learn a specific...
Provided by International Journal of Computer Technology and Applications
-
Whitepapers
Measurement of Real Time Information Using GPU
Aug 2012
Parallel programming is about performance, for otherwise the authors would write a sequential program. A problem is where to find truly parallel hardware that can be dedicated to the task, One...
Provided by International Journal of Computer Technology and Applications
-
Whitepapers
Efficient Subsequence Search on Streaming Data Based on Time Warping Distance
May 2011
Many algorithms have been proposed to deal with subsequence similarity search problem in time series data stream. Dynamic Time Warping (DTW), which has been accepted as the best distance measure...
Provided by Chulalongkorn University
-
Whitepapers
The Design and Development of Microstrip Patch Antenna Using Simulation Studies by ADS
Jan 2012
The matching network of a Microstrip Patch Antenna at 10.65 GHz was designed and developed using the software Advanced Design System (ADS). ADS is powerful software for designing microwave...
Provided by Interscience Open Access Journals
-
Whitepapers
Design and Implementation of an Enhanced DDS Based Digital Modulator for Multiple Modulation Schemes
Jul 2011
This paper deals with the design & implementation of a Digital Modulator based on the FPGA. The design is implemented using the Enhanced Direct Digital Synthesis (DDS) Technology. The basic DDS...
Provided by Interscience Open Access Journals
-
Whitepapers
The Vital Few and Trivial Many: An Empirical Analysis of the Pareto Distribution of Defects
Mar 2009
The Pareto Principle is a universal principle of the "Vital few and trivial many". According to this principle, the 80/20 rule has been formulated with the following meaning: for many phenomena,...
Provided by Gesellschaft fur Informatik e.V.
-
Whitepapers
Generation of Transconductance Grounded Capacitor Filters From LC Ladder Prototypes Based on Multi-Terminal Gyrator Principles
Jul 2008
A simple novel procedure for the generation of continuous time Transconductance Grounded Capacitor (TGC) filters from LC ladder prototype is introduced. This method results in circuits where all...
Provided by Institute of Electrical & Electronic Engineers
-
Whitepapers
Automated Fault Diagnosis in Embedded Systems
Jan 2012
Automated fault diagnosis is emerging as an important factor in achieving an acceptable and competitive cost/dependability ratio for embedded systems. In this paper, the authors introduce...
Provided by Delft University of Technology
-
Whitepapers
Think: View-Based Support of Non-Functional Properties in Embedded Systems
Apr 2009
Component-Based Software Engineering (CBSE) does not yet fully address non-functional requirements of embedded systems. The authors show how to extend a component model like FRACTAL with relevant...
Provided by Institute of Electrical & Electronic Engineers
-
Whitepapers
Model Driven High-Level Power Estimation of Embedded Operating Systems Communication Services
Apr 2009
This paper presents a System level Model Driven Architecture (MDA) approach for power estimation of Real Time Operating System (RTOS) communication and synchronization services at early design...
Provided by Institute of Electrical & Electronic Engineers
-
Whitepapers
An Automatic Compiler Optimizations Selection Framework for Embedded Applications
Apr 2009
Optimizing compilers provide users with compiler options to maximize program performance. The selection of compiler options is important as the resulted performance can vary significantly. The...
Provided by Institute of Electrical & Electronic Engineers
-
Whitepapers
A Lightweight Dynamic Performance Monitoring Framework for Embedded Systems
Apr 2009
Traditional monitoring techniques are not suitable for embedded systems because they could incur significant overhead. This paper proposes a lightweight dynamic performance monitoring framework...
Provided by Institute of Electrical & Electronic Engineers
-
Whitepapers
A Mixed Timing System-Level Embedded Software Modelling and Simulation Approach
Apr 2009
System-level software modelling and simulation have become important techniques for real-time embedded system early design space exploration. However, the timing accuracy issues have not been...
Provided by Institute of Electrical & Electronic Engineers
-
Whitepapers
The Design and Implementation of Hardware Task Configuration Management Unit on Dynamically Reconfigurable SoC
Apr 2009
The advantages and the flexibility introduced into the hardware implementation by partial dynamic reconfiguration have rapidly changed the design flow of embedded systems. Configuration management...
Provided by Institute of Electrical & Electronic Engineers
-
Whitepapers
Application Based Comparison of Different Analog to Digital Converter Architectures
Aug 2010
A review study of the most popular type of analog to digital converters-successive approximations, flash, pipelined and sigma-delta has been performed in this paper. The paper elaborates the...
Provided by International Journal of Engineering Science and Technology (IJEST)
-
Whitepapers
Implementation of SVPWM in FPGA Through MATLAB/SIMULNK Environment
Sep 2010
Control of AC induction machines using the vector control techniques is becoming more popular nowadays. The need for extensive computations has no more become an objection to the vector control...
Provided by International Journal of Engineering Science and Technology (IJEST)
-
Whitepapers
Design and Implementation of PLL Reconfiguration Using FPGA
Feb 2011
A circuit to dynamically reconfigure the clock frequency of a synchronous digital system according to the changing needs of the application is described in this paper. This paper generally relates...
Provided by International Journal of Engineering Science and Technology (IJEST)
-
Whitepapers
Low Power Implementation of Triple-Des Block 65nm Technology
May 2012
Power and delay are two main constraints in ASCI design. Trying to optimize the design with respect to power might result in an increase in the delay. This trade-off between power and delay are...
Provided by International Journal of Engineering Science and Technology (IJEST)
-
Whitepapers
Implementation of Dual-Core Multithreaded Processor on Xilinx Spartan-III FPGA
Dec 2011
Technology is emerging at a very rapid way and the need for smaller and faster systems has been increasing today at an exponential rate along with time. This need for design and implementation of...
Provided by International Journal of Engineering Science and Technology (IJEST)
-
Whitepapers
Efficient Non Symmetric Pairing Groups on Ordinary Pairing Friendly Curve of Embedding Degree 1
Apr 2011
Recently, ordinary pairing - friendly elliptic curves whose embedding degree is 1 have been often focused on, for example some composite order pairing - based cryptographies do. In the case of non...
Provided by Institute of Electrical & Electronic Engineers
-
Whitepapers
UbiFOS: A Small Real-Time Operating System for Embedded Systems
Jun 2007
The Ubiquitous Flexible Operating System (UbiFOS) is a real-time operating system designed for cost-conscious, low-power, small to medium-sized embedded systems such as cellular phones, MP3...
Provided by Electronics and Telecommunication Research Institute
-
Whitepapers
A New Scan Partition Scheme for Low-Power Embedded Systems
Jun 2008
A new scan partition architecture to reduce both the average and peak power dissipation during scan testing is proposed for low-power embedded systems. In scan-based testing, due to the extremely...
Provided by Electronics and Telecommunication Research Institute
-
Whitepapers
On-Chip Bus Serialization Method for Low-Power Communications
Aug 2010
One of the critical issues in on-chip serial communications is increased power consumption. In general, serial communications tend to dissipate more energy than parallel communications due to bit...
Provided by Electronics and Telecommunication Research Institute
-
Whitepapers
Disguised-Face Discriminator for Embedded Systems
Oct 2010
In this paper, the authors introduce an improved Adaptive Boosting (AdaBoost) classifier and its application, a disguised-face discriminator that discriminates between bare and disguised faces....
Provided by Electronics and Telecommunication Research Institute
-
Whitepapers
Verifiable Computation With Massively Parallel Interactive Proofs
May 2012
As the cloud computing paradigm has gained prominence, the need for verifiable computation has grown increasingly urgent. Protocols for verifiable computation enable a weak client to outsource...
Provided by Harvard University
-
Whitepapers
A Comparitive Analysis on Nanowire Based MEMS Pressure Sensor
Apr 2012
This paper compares a MEMS Piezoresistive pressure sensor which utilizes a circular and square shaped polysilicon diaphragm with a nanowire to enhance the sensitivity of the pressure sensor. The...
Provided by SRM University
-
Whitepapers
Optimal Implementation Methods for Audio Crosstalk Cancellation on DSP Processors
May 2012
In general, frequency domain based techniques are preferred to time domain techniques for the implementation of audio crosstalk cancellation due to time domain techniques suffer from more...
Provided by K L University
-
Whitepapers
Xilinx and Modelsim Habitat for Design of ECC Co-Processor Architecture
Apr 2012
Xilinx is a most significant synthesizing tool for controller design in various engineering field specifically industrial engineering, instrumentation engineering, robotics, telecommunication,...
Provided by Sathyabama University
-
Whitepapers
Dynamic Scheduling of Test Routines for Efficient Online Self-Testing of Embedded Microprocessors
Oct 2008
This paper presents a self-testing framework targeting the LEON3 embedded microprocessor with built-in test-scheduling features. The proposed design exploits existing postproduction test sets,...
Provided by Institute of Electrical & Electronic Engineers
-
Whitepapers
Constraint-Based Test-Scheduling of Embedded Microprocessors
Aug 2008
Test scheduling is a key aspect in the automation of embedded microprocessors self-testing. This paper presents a self-testing framework targeting the LEON3 embedded microprocessor with built-in...
Provided by University of Essex
-
Whitepapers
Optimized Design of Substrate Integrated Waveguide Cavity Based Oscillators
Feb 2010
This paper presents a study of the use of Substrate Integrated Waveguide (SIW) cavities in the design of microwave oscillators and their effect on phase noise performance. Harmonic Balance (HB)...
Provided by Centre Tecnològic de Telecomunicacions de Catalunya (CTTC)
-
White Papers
On the Design of Low-Power Cache Memories for Homogeneous Multi-Core Processors
Feb 2010
This paper investigates the impact of Level-1 Cache (CL1) parameters, Level-2 Cache (CL2) parameters, and cache organizations on the power consumption and performance of multi-core systems. The...
Provided by Institute of Electrical and Electronics Engineers
-
White Papers
Impact of Level-2 Cache Sharing on the Performance and Power Requirements of Homogeneous Multicore Embedded Systems
Jun 2009
In order to satisfy the needs for increasing computer processing power, there are significant changes in the design process of modern computing systems. Major chip-vendors are deploying multicore...
Provided by Reed Elsevier
-
White Papers
Feedback Thermal Control of Real-Time Systems on Multicore Processors
Jan 2011
Real-time systems face significant challenges in thermal management with their adoption of modern multicore processors. While earlier research on feedback thermal control has shown promise in...
Provided by Washington University in St. Louis
-
White Papers
Online Adaptive Utilization Control for Real-Time Embedded Multiprocessor Systems
Oct 2008
To provide Quality of Service (QoS) guarantees in open and unpredictable environments, the utilization control problem is defined to keep the processor utilization at the schedulable utilization...
Provided by Association for Computing Machinery
-
White Papers
Run-Time Thermal Management of Three-Dimensional Chip-Multiprocessors
May 2008
Three-dimensional (3D) integration has the potential to improve the communication latency and integration density of chip-level multiprocessors (CMPs). However, the stacked high power density...
Provided by Northwestern University
-
White Papers
User-And Process-Driven Dynamic Voltage and Frequency Scaling
Feb 2009
The authors describe and evaluate two new, independently-applicable power reduction techniques for power management on processors that support Dynamic Voltage and Frequency Scaling (DVFS):...
Provided by Northwestern University
-
White Papers
Temperature-Aware Scheduling and Assignment for Hard Real-Time Applications on MPSoCs
Jul 2010
Increasing Integrated Circuit (IC) power densities and temperatures may hamper MultiProcessor System-on-Chip (MPSoC) use in hard real-time systems. This paper formalizes the temperature-aware...
Provided by Institute of Electrical and Electronics Engineers
-
White Papers
C-Pack: A High-Performance Microprocessor Cache Compression Algorithm
Sep 2009
Microprocessor designers have been torn between tight constraints on the amount of on-chip cache memory and the high latency of off-chip memory, such as dynamic random access memory. Accessing...
Provided by Institute of Electrical and Electronics Engineers
-
White Papers
Characterization of Single-Electron Tunneling Transistors for Designing Low-Power Embedded Systems
Apr 2008
Minimizing power consumption is vitally important in embedded system design; power consumption determines battery lifespan. Ultra-low-power designs may even permit embedded systems to operate...
Provided by Northwestern University
-
White Papers
Three-Dimensional Chip-Multiprocessor Run-Time Thermal Management
Aug 2008
Three-dimensional integration has the potential to improve the communication latency and integration density of Chip-level MultiProcessors (CMPs). However, the stacked highpower density layers of...
Provided by Institute of Electrical and Electronics Engineers
-
White Papers
Application-Specific MPSoC Reliability Optimization
May 2008
This paper presents modeling and estimation techniques permitting the temperature-aware optimization of application-specific MultiProcessor System-on-Chip (MPSoC) reliability. Technology scaling...
Provided by Institute of Electrical and Electronics Engineers
-
White Papers
Performance and Power Modeling in a Multi-Programmed Multi-Core Environment
Jun 2010
This paper describes a fast, automated technique for accurate on-line estimation of the performance and power consumption of interacting processes in a multi-programmed, multi-core environment....
Provided by Association for Computing Machinery
-
White Papers
Multi-Optimization Power Management for Chip Multiprocessors
Oct 2008
The emergence of power as a first-class design constraint has fueled the proposal of a growing number of run-time power optimizations. Many of these optimizations trade-off power saving...
Provided by Association for Computing Machinery
-
White Papers
Power Deregulation: Eliminating OffChip Voltage Regulation Circuitry From Embedded Systems
Oct 2007
In battery-powered embedded systems, dedicated circuitry is used to convert stored energy into a form that can be directly used by processors. These power regulation devices seek to mask non-ideal...
Provided by Association for Computing Machinery
-
White Papers
Three-Dimensional Multiprocessor System-on-Chip Thermal Optimization
Oct 2007
3D stacked wafer integration has the potential to improve MultiProcessor System-on-Chip (MPSoC) integration density, performance, and power efficiency. However, the power density of 3D MPSoCs...
Provided by Association for Computing Machinery
-
White Papers
Power Reduction Through Measurement and Modeling of Users and CPUs: Summary
Jun 2007
Dynamic Voltage and Frequency Scaling (DVFS) is one of the most commonly used power reduction techniques in high-performance processors. DVFS varies the frequency and voltage of a microprocessor...
Provided by Association for Computing Machinery
-
White Papers
The Mobile Sensing Platform: An Embedded Activity Recognition System
Apr 2008
Activity-aware systems have inspired novel user interfaces and new applications in smart environments, surveillance, emergency response, and military missions. Systems that recognize human...
Provided by Institute of Electrical and Electronics Engineers
-
White Papers
Maestro: Orchestrating Lifetime Reliability in Chip Multiprocessors
Nov 2009
As CMOS feature sizes venture deep into the nanometer regime, wearout mechanisms including negative-bias temperature instability and time-dependent dielectric breakdown can severely reduce...
Provided by University of Michigan
-
White Papers
Putting Faulty Cores to Work
Nov 2010
Since the non-cache parts of a core are less regular, compared to on-chip caches, tolerating manufacturing defects in the processing core is a more challenging problem. Due to the lack of...
Provided by University of Michigan
-
White Papers
A Power-Efficient 32 Bit ARM Processor Using Timing-Error Detection and Correction for Transient-Error Tolerance and Adaptation to PVT Variation
Jan 2010
Razor is a hybrid technique for dynamic detection and correction of timing errors. A combination of error detecting circuits and micro-architectural recovery mechanisms creates a system that is...
Provided by Institute of Electrical and Electronics Engineers
-
White Papers
Bridging the Computation Gap Between Programmable Processors and Hardwired Accelerators
Dec 2008
New media and signal processing applications demand ever higher performance while operating within the tight power constraints of mobile devices. A range of hardware implementations is available...
Provided by University of Michigan
-
White Papers
DVFS in Loop Accelerators Using BLADES
Jun 2008
Hardware accelerators are common in embedded systems that have high performance requirements but must still operate within stringent energy constraints. To facilitate short time-to-market and...
Provided by Association for Computing Machinery
-
White Papers
Stream Compilation for Real-Time Embedded Multicore Systems
Mar 2009
Multicore systems have not only become ubiquitous in the desktop and server worlds, but are also becoming the standard in the embedded space. Multicore offers programmability and flexibility over...
Provided by University of Michigan
-
White Papers
A Parameterized Dataflow Language Extension for Embedded Streaming Systems
Apr 2008
Many embedded DSP systems can be characterized as streaming applications. Imperative programming languages are ill suited for describing the concurrency within these DSP systems. SPEX is a...
Provided by Arizona State University
-
White Papers
Experiences of Designing and Deploying Intelligent Sensor Nodes to Monitor Hand-Arm Vibrations in the Field
Jun 2007
The NEMO project is exploring the use of mobile sensor nodes to augment physical work artefacts in order to ensure compliance with health and safety regulations. In this paper the authors present...
Provided by Association for Computing Machinery
-
White Papers
ViRe: Virtual Reconfiguration Framework for Embedded Processing in Distributed Image Sensors
Feb 2008
Image processing applications introduce new challenges to the design of sensor network systems via non-trivial in-network computation. As embedded processing becomes more complex, in-situ...
Provided by University of California
-
White Papers
Variability-Aware Duty Cycle Scheduling in Long Running Embedded Sensing Systems
Dec 2010
Instance and temperature-dependent leakage power variability is already a significant issue in contemporary embedded processors, and one which is expected to increase in importance with scaling of...
Provided by University of California
-
White Papers
A Case for Opportunistic Embedded Sensing in Presence of Hardware Power Variability
Sep 2010
The system lifetime gains provided by the various power management techniques in embedded sensing systems are a strong function of the active and sleep mode power consumption of the underlying...
Provided by University of California
-
White Papers
Knots: An Efficient Single Stack Preemption Mechanism for Resource Constrained Devices
Oct 2007
The low-end embedded systems space is characterized by two classes of operating systems: Run-To-Completion (RTC) systems such as Tenos and preemptive multithreading systems such as Mantis. In RTC...
Provided by University of California
-
White Papers
Optimizing Bandwidth of Call Traces for Wireless Embedded Systems
Jul 2009
Call traces expose runtime behaviors that greatly aid system developers in profiling performance and diagnosing problems within wireless embedded applications. Strict resource constraints limit...
Provided by Institute of Electrical and Electronics Engineers
-
White Papers
Flashpower: A Detailed Power Model for Nand Flash Memory
Dec 2009
Flash memory is widely used in consumer electronics products, such as cell-phones and music players, and is increasingly displacing hard disk drives as the primary storage device in laptops,...
Provided by University of Virginia
-
White Papers
Exploring the Thermal Impact on Manycore Processor Performance
Feb 2010
Performance of processors with many simple parallel cores is limited by the serial part of the workload, requiring an asymmetric core organization with one or more aggressive "Primary" cores for...
Provided by Institute of Electrical and Electronics Engineers
-
White Papers
Interaction of Scaling Trends in Processor Architecture and Cooling
Feb 2010
It is predicted that two important trends are likely to accompany traditional CMOS semiconductor technology scaling chip multiprocessors and 3D integration. With the ever increasing power...
Provided by Institute of Electrical and Electronics Engineers
-
White Papers
Cell-SWat: Modeling and Scheduling Wavefront Computations on the Cell Broadband Engine
May 2008
This paper presents and evaluates a model and a methodology for implementing parallel wavefront algorithms on the Cell Broadband Engine. Wavefront algorithms are vital in several application areas...
Provided by Association for Computing Machinery
-
White Papers
A Pluggable Framework for Parallel Pairwise Sequence Search
Jun 2007
The current and near future of the computing industry is one of multi-core and multi-processor technology. Most existing sequence-search tools have been designed with a focus on single-core,...
Provided by Virginia Tech
-
White Papers
Accelerating Electrostatic Surface Potential Calculation With Multi-Scale Approximation on Graphics Processing Units
May 2010
Tools that compute and visualize biomolecular electrostatic surface potential have been used extensively for studying biomolecular function. However, determining the surface potential for large...
Provided by Reed Elsevier
-
White Papers
Impact of Network Sharing in Multi-Core Architectures
May 2007
As commodity components continue to dominate the realm of high-end computing, two hardware trends have emerged as major contributors high-speed networking technologies and multi-core...
Provided by Argonne National Laboratory
-
White Papers
Modeling and Analysis of Power in Multicore Network Processors
Feb 2008
With the emergence of multi-core network processors in support of high-performance computing and networking applications, power consumption has become a problem of increasing significance....
Provided by University of Massachusetts Lowell
-
White Papers
A Performance Study of Multiprocessor Task Scheduling Algorithms
Jun 2007
Multiprocessor task scheduling is an important and computationally difficult problem. A large number of algorithms were proposed which represent various tradeoffs between the quality of the...
Provided by Springer Science+Business Media
-
White Papers
Microprocessor Verification Via Feedback-Adjusted Markov Models
Jun 2007
The challenge of verifying a modern microprocessor design is an overwhelming one: Increasingly complex microarchitectures combined with heavy time-to-market pressure have forced microprocessor...
Provided by Institute of Electrical and Electronics Engineers
Keep Up with TechRepublic
Submit a Paper
Get your content listed in our directory!
Our directory is the largest library of vendor-supplied technical content on the Web. It’s also the first place IT decision makers turn to when researching technology solutions. Our members are already finding your competitors’ papers here - shouldn’t they find yours, too? It's FREE so click here and submit your white paper, case study, data sheet, research report, or other document today!
