Fast and Scalable Pattern Matching for Memory Architecture

Multi-pattern matching is known to require intensive memory accesses and is often a performance bottleneck. Hence, specialized hardware-accelerated algorithms are being developed for line-speed packet processing. While several pattern matching algorithms have already been developed for such applications, the authors find that most of them suffer from scalability issues. They present a hardware-implementable pattern matching algorithm for content filtering applications, which is scalable in terms of speed, the number of patterns and the pattern length. They modify the classic Aho-Corasick algorithm to consider multiple characters at a time for higher throughput.