Hardware Acceleration of Transactional Memory on Commodity Systems
The adoption of transactional memory is hindered by the high overhead of software transactional memory and the intrusive design changes required by previously proposed TM hardware. The authors propose that hardware to accelerate Software Transactional Memory (STM) can reside outside an unmodified commodity processor core, thereby substantially reducing implementation costs. This paper introduces Transactional Memory Acceleration using Commodity Cores (TMACC), a hardware-accelerated TM system that does not modify the processor, caches, or coherence protocol. They present a complete hardware implementation of TMACC using a rapid prototyping platform. Using this hardware, they implement two unique conflict detection schemes which are accelerated using Bloom filters on an FPGA.