High Throughput and Hardware Efficient FFT Architecture for LTE Application
In this paper, the authors propose a high throughput and hardware efficient Fast Fourier Transform (FFT) architecture for Long Term Evolution (LTE) application. The proposed Enhancement Delay Element Matrix (EDEM) which contains the mixed radix unit supports 25, 16, 9, 8, 5, 4, 3 and 2-point FFTs. The reuse technology is also applied into EDEM to reduce the hardware resource. The EDEM reduces the computation cycles significantly since the high radix decomposition method is applied. Compared with the stated of art technology, the proposed scheme improves 2x-4x throughput rate with comparable hardware cost.