OpenSPARC: An Open Platform for Hardware Reliability Experimentation
Source: Stanford University
OpenSPARC is an open source community based around hardware design and experimentation aids for the UltraSPARC T1 and T2 Chip Multi-Threaded (CMT) microprocessors. The UltraSPARC T2 processor is the industry's first "Server on a chip", with 8 cores, 64 threads and on-chip networking and security. The richness of the RTL source code, tools and information in OpenSPARC has made it a comprehensive, practical and relevant platform for research in several areas of computing. This paper highlights the potential of using OpenSPARC for research in hardware reliability. Examples of university research projects, results achieved, benefits gained and lessons learned using OpenSPARC are described. Future research directions in reliability based on OpenSPARC are proposed.