Operating System Support for Shared-ISA Asymmetric Multi-Core Architectures
Current trends in multi-core processor implementation scale by duplicating a single core design many times in a package; however, this approach can cause inefficient utilization of resources, such as die space and power. Recent research has proposed asymmetric cores as an alternative solution. This paper explores the design space for asymmetric multi-core architectures, and presents a case study and prototype of one design in which cores implement overlapping, but non-identical instruction sets. The authors propose fault-and-migrate, which enables the OS to manage hardware asymmetries transparently to applications.