Optimal Regulation of Traffic Flows in Networks-on-Chip

Integrating IPs into a SoC infrastructure presents challenges because traffic flows from IPs are diverse and typically have stringent performance constraints; the impact of interferences among traffic flows is hard to analyze; due to the cost and power constraint, buffers in the SoC infrastructure must not be over-dimensioned while still satisfying performance requirements even under worst case conditions. The admission of traffic flows from source IPs into the SoC infrastructure can be controlled by a regulator rather than injecting them as soon as possible. In this way, the authors can control Quality-of-Service (QoS) and achieve cost-effective communication.