Performance Analysis of Soft and Hard Single-Hop and Multi-Hop Circuit-Switched Interconnects for FPGAs

This paper presents a performance analysis of hard and soft on-chip networks for FPGAs. The authors applied the Jackson's queuing model to analyze the performance of a MultiProcessor System on a Chip (MPSoC). They further used the Jackson's model to analyze circuit-switched networks on chip (NoC). Their simulation results showed the same trend as that of the analytical model. Considering streaming media applications and the Æthereal NoC, an analysis is conducted to compare hard and soft NoCs. The analysis and simulation indicate that the hardwired networks perform significantly better than conventional soft NoCs.