Performance Modeling of a Network Processor Data Path Using Queuing Systems

Requirement of Performance Modeling during the early SoC design stages becomes increasingly important to take major system level decisions relating to hardware resources, mapping of functionality onto computing modules and selection of scheduling algorithms which affects the design significantly. In this paper, the authors make use of Queuing Systems to model the Data Path of Network Processors to decide on the Internal and External memory requirements of an ASIC or Soc. They propose a framework developed using System-C, which can be used for Performance Modeling & Simulations of Network Processing Engines. The real time internet traffic patterns seen across US and Japan are used to stimulate the performance model.