Preserving Timing Anomalies in Pipelines of High-End Processors

Many embedded systems are subject to temporal constraints that require advance guarantees on meeting deadlines. Such systems rely on static analysis to safely bound Worst-Case ExecuTion (WCET) bounds of tasks. Designers of these systems are forced to avoid state-of-the-art processors due to their inherent architectural complexity that results in non-determinism. Such micro-processors are typically tuned to reduce average-case execution times - at the expense of predictability. Dynamic instruction scheduling techniques, such as Out-Of-Order (OOO) execution, are examples of features that reduce average time but are statically unpredictable at large.