Queueing Behavior and Packet Delays in Network Processor Systems
Network processor systems provide the performance of ASICs combined with the programmability of general-purpose processors. One of the main challenges in designing these systems is the memory subsystem used when forwarding and queueing packets. In this paper, the authors study the queueing behavior and packet delays in a network processor system which works as a router. They introduce a system model and a simulation tool based on the model. Using the simulation tool, both best-effort and diffserv IPv4 forwarding were modeled and tested using real-world and synthetically generated packet traces. The results on queueing behavior have been used to dimension various queues, and can be used as guidelines for designing memory subsystems and queueing disciplines.