Reconfigurable Optimized WCDMA DDC for Software Defined Radios

In this paper an optimized approach is presented to design & implement WCDMA based digital down converter for software defined radios. The proposed DDC is designed using Park McClellan algorithm to achieve optimal filter order for hardware reduction. A computationally efficient polyphase decomposition structure is presented to enhance the speed and area efficiency. The embedded multipliers and LUTs of target FPGA have been efficiently utilized to enhance the system performance. The proposed DDC model is designed with Matlab, synthesized with Xilinx Synthesis Tool (XST) and implemented on Virtex-II Pro based xc2vp30-7ff896 FPGA device.