Software Platform Based Embedded Multiprocessor SoC Prototyping
Source: University of Perpignan
This paper describes the authors' experience in processor/threads synchronization using the POSIX API standard for MPSoC virtual applications prototyping. Spin-Lock (Binary Semaphore) implementations on general purpose CPU are based on an atomic read and (conditional) write of a shared variable. In modern multiprocessor implementations, these operations occur as dependent pairs of conditional instructions, such as load linked and store conditional. They present and discuss how a hardware semaphore could be a more efficient mechanism for processor/threads synchronisation that is CPU family independent.
| Format: | Size: | 106.50 | |
| Date: | Apr 2009 |



