Use of Parity Checks Inherent in LDPC Codes for Dominant Error Events Detection and K-Constraint Enforcement
Source: Rensselaer at Hartford
In this paper, the authors propose to leverage the simple and explicit parity checks inherent in Low-Density Parity-Check (LDPC) codes to realize dominant error events detection without code rate penalty. This is enabled by enforcing a very weak constraint on LDPC code parity check matrix structure. Such a constraint can be readily satisfied by most structured LDPC codes ever studied in the open literature such as Quasi-Cyclic (QC) LDPC codes. Moreover, this zero-redundancy dominant error events detection can be further extended to handle the deliberate bit errors when deliberate bit-flipping is used to enforce k-constraints. The effectiveness of the proposed methods has been demonstrated through computer simulations.