VC-1 Video Decoder Optimization on ARM Cortex-A8 With NEON

Optimization of VC-1 Main profile decoder has been proposed using SIMD engine (NEON) of ARM Cortex-A8 processor. The authors have exploited data level parallelism to effectively use the SIMD capability of NEON. Ideas to make the algorithms SIMD friendly are also highlighted. With effective use of ARM Cortex-A8 architecture and NEON SIMD engine, the MCPS (Mega Cycles Per Second) requirement for decoding has reduced considerably as compared to the authors' optimized C implementation. Results are provided for the overall performance gain in decoding and individual performance gain in various modules of VC-1 Main profile decoder.