Vector LLVA: A Virtual Vector Instruction Set for Media Processing

The authors present Vector LLVA, a Virtual Instruction Set Architecture (VISA) that exposes extensive static information about vector parallelism while avoiding the use of hardware-specific parameters. They provide both arbitrary-length vectors (for targets that allow vectors of arbitrary length, or where the target length is not known) and fixed-length vectors (for targets that have a fixed vector length, such as subword SIMD extensions), together with a rich set of operations on both vector types. They have implemented translators that compile vector LLVA written with arbitrary-length vectors to the Motorola RSVP architecture and vector LLVA written with fixed-length vectors to both AltiVec and Intel SSE2.