If we were to think about electronic devices as molecules, the semiconductor would be the atom, and changes to these building blocks often have huge implications for the future of technology as a whole.

On Thursday, July 9, 2015, IBM Research announced the production of a 7nm node test chips with working transistors. IBM, Samsung, GlobalFoundries, and SUNY Polytechnic Institute’s Colleges of Nanoscale Science and Engineering (SUNY Poly CNSE) all participated in the development of the technology, which could enable up to 20 billion transistors on a chip the size of a human fingernail.

“The mainstream production of most parts is 22nm right now,” said Forrester analyst Richard Fichera. “There’s early production of 14nm parts now, and more of those coming out later this year. 10nm will start to hit next year [with] early deliveries. And, 7nm is a cycle beyond that, so they’re sort of leapfrogging the next production cycle.”

Typically, Fichera said, semiconductors transition by about one over the square root of two, meaning they up shrink by roughly 30% and give twice the number of transistors per area. The fact that IBM has been able to produce a working chip at 7nm means that it has bypassed Moore’s Law in the development cycle.

Now, we probably won’t see 7nm chips in production very soon, but this announcement is still a milestone. According to Michael Liehr, executive vice president for innovation and technology at SUNY Poly CNSE who worked on the project, the development cycle from the earliest conception to a production-ready chip could take 7-10 years, with each step taking a year to a year and a half.

“It is now an established process that has been proven to yield something,” Liehr said. “But, the next steps along the line would be to ensure that you could repeatedly make it and improve the quality of the process and add more features and details to it.”

Liehr said it would probably be another two to three years before the 7nm chips are fully ready for manufacturing.

There are two key changes that allowed the production of the transistors at this size. The first innovation was the use of Silicon Germanium (SiGe) channel transistors. Germanium is blended with silicon in an alloy fashion. The germanium atom is bigger than silicon, Liehr said, so when you mix it in, it expands and puts pressure on the surrounding silicon.

“That pressure is actually very helpful in order to get changes in the speed in which carriers go through silicon,” Liehr said.

That helps with the performance of the device, which increased by around 50%. The blend has been used for a while for semiconductor contacts, but this is the first instance where the blended germanium silicon has been used in the current path.

The second change is the use of extreme ultraviolet (EUV) lithography to create the chips, which is the primary driver of the smaller scale. Traditionally, chips are manufactured using UV lithography, also known as photolithography.

“If you have a working EUV it means you can do it with fewer lithography steps,” Fichera said.

Fewer steps could mean a lower manufacturing cost, but the cost of tooling up EUV could cancel out those cost savings, especially in the early days, Fichera said. However, the use of EUV could lead to the retooling of the entire industry as EUV enables further scaling down of the chips.

There is a potential downside, Fichera said, as a possible retooling could cost billions of dollars and could lead to further consolidation of the manufacturing chain because only the major players in the space would be able to afford to retool their manufacturing facilities.

According to an IBM press release, the company sees cloud computing, big data systems, cognitive computing, and mobile products as likely targets for the new technology. As far as mobile goes, the new chip is important because it can help devices retain performance and cut power usage, or improve performance with the same battery life.

“Typically what the cell phone providers will do is sort of a mix of these,” Liehr said. “They provide additional features, but then they also take advantage of the lower power consumption to get you longer battery life.”

The low power will be the big battleground, Fichera said, with the biggest battle occurring between Intel and IBM. He added that IoT type devices will be a critical use case for the small size and low power. Additionally, there is potential for system on a chip (SOC) applications, which Fichera describes as: “The notion that, in addition to the CPU, you also have memory and other logic elements on the same chip.”

On IBM’s 10nm chip, the company said it was possible to put D-RAM on the chip. If that’s possible on the 7nm chip, it would better lend to the potential for SOC.

Overall, Fichera believes this is good news for everyone in industry as it could ramp up development in getting to the next development cycle. However, that push is going to spur on a new level of competition between the semiconductor giants.

“The drama will be great, and I would expect Intel to fire a shot off soon in response. They can’t let this go unanswered,” Fichera said. “It will be interesting to see what they have to say.”