Building a slide deck, pitch, or presentation? Here are the big takeaways:

  • IBM’s new mixed-precision in-memory computing concept combines a von Neumann machine with a computational memory unit to improve data processing speed and costs.
  • IBM’s mixed-precision in-memory computing concept could make training AI systems faster and less costly.

As we enter a new era of cognitive computing and try to glean insights from increasingly large datasets, many of today’s computers are not optimized to handle such large workloads. But a new hybrid concept developed by IBM scientists and published in Nature Electronics could make it far easier to run analytics and machine learning applications and train artificial intelligence (AI) systems.

Most computers are designed based on the von Neumann architecture, which requires data to be transferred between processing and memory units–an inefficient process, according to a Tuesday IBM Research blog post about the paper.

IBM’s new concept, called mixed-precision in-memory computing, combines a von Neumann machine with a computational memory unit. In this design, the computational memory unit performs most of the computational tasks, while the von Neumann machine improves on the accuracy of the solution at hand.

“The system therefore benefits from both the high precision of digital computing and the energy/areal efficiency of in-memory computing,” according to the post.

SEE: IT leader’s guide to the future of artificial intelligence (Tech Pro Research)

The approach could give IBM the solution to the hardware accelerators for high-performance and machine learning applications that Microsoft and Google have been seeking, as noted by our sister site ZDNet.

Mixed-precision in-memory computing relies on devices called phase change memory (PCM), which can be programmed to reach a certain level of conductivity. The PCM units can handle most of the heavy-lift data processing without needing to transfer data to a CPU or GPU, which makes for faster processing with lower energy costs, ZDNet noted.

“The fact that such a computation can be performed partly with a computational memory without sacrificing the overall computational accuracy opens up exciting new avenues towards energy-efficient and fast large-scale data analytics,” IBM fellow Evangelos Eleftheriou, a co-author of the paper, wrote in the post.

“This approach overcomes one of the key challenges in today’s von Neumann architectures in which the massive data transfers have become the most energy-hungry part,” he wrote. “Such solutions are in great demand because analyzing the ever-growing datasets we produce will quickly increase the computational load to the exascale level if standard techniques are to be used.”

It’s important to note that this research is still new, and that IBM’s prototype memory chip will need to reach gigabytes of memory to be useful for data center-scale applications, instead of its current one megabyte, according to ZDNet. But IBM has plans to reach this goal by building larger arrays of PCM devices, or having several operate in tandem, ZDNet reported.